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1b1ebb0a8d
Add new hal to log the mme exception register information. Support added for Turing only. On mme exception interrupt, read the mme_hww_esr register and log the error based on esr register bits. JIRA NVGPU-1241 Change-Id: Ied3db0cc8fe6e2a82ecafc9964875e2686ca0d72 Signed-off-by: Vinod G <vinodg@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2005807 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>