Files
linux-nvgpu/drivers/gpu/nvgpu/common/sync/channel_sync_priv.h
Konsta Hölttä e9747d5477 gpu: nvgpu: remove wait_fence_fd from incr_user
The wait_fence_fd parameter in nvgpu_channel_sync_incr_user() has not
been used since commit 1a4647272f ("gpu: nvgpu: remove fence
dependency tracking") where it was used to save a dependency fd to
sema-based post fences. The commit probably should have removed this
param; it has no purpose in the current design.

Jira NVGPU-4548

Change-Id: Id7e68b24f8e9ba0e43ff01b7af946434580b166e
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2326604
(cherry picked from commit f8031142270fb87ac41597ae70a80505078ae6d5)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2328423
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:13:28 -06:00

83 lines
2.8 KiB
C

/*
* Nvgpu Channel Synchronization Abstraction
*
* Copyright (c) 2014-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef NVGPU_CHANNEL_SYNC_PRIV_H
#define NVGPU_CHANNEL_SYNC_PRIV_H
/*
* These APIs are used for job synchronization that we know about in the
* driver. If submits happen in userspace only, none of this will be needed and
* won't be included. This is here just to double check for now.
*/
#ifdef CONFIG_NVGPU_KERNEL_MODE_SUBMIT
#include <nvgpu/atomic.h>
#include <nvgpu/types.h>
struct priv_cmd_entry;
struct nvgpu_fence_type;
struct nvgpu_channel_sync_ops;
/*
* This struct is private and should not be used directly. Users should
* instead use the public APIs starting with nvgpu_channel_sync_*
*/
struct nvgpu_channel_sync {
nvgpu_atomic_t refcount;
const struct nvgpu_channel_sync_ops *ops;
};
/*
* This struct is private and should not be used directly. Users should
* instead use the public APIs starting with nvgpu_channel_sync_*
*/
struct nvgpu_channel_sync_ops {
int (*wait_fence_raw)(struct nvgpu_channel_sync *s, u32 id, u32 thresh,
struct priv_cmd_entry *entry);
int (*wait_fence_fd)(struct nvgpu_channel_sync *s, int fd,
struct priv_cmd_entry *entry, u32 max_wait_cmds);
int (*incr)(struct nvgpu_channel_sync *s,
struct priv_cmd_entry *entry,
struct nvgpu_fence_type *fence,
bool need_sync_fence,
bool register_irq);
int (*incr_user)(struct nvgpu_channel_sync *s,
struct priv_cmd_entry *entry,
struct nvgpu_fence_type *fence,
bool wfi,
bool need_sync_fence,
bool register_irq);
void (*set_min_eq_max)(struct nvgpu_channel_sync *s);
void (*destroy)(struct nvgpu_channel_sync *s);
};
#endif /* CONFIG_NVGPU_KERNEL_MODE_SUBMIT */
#endif /* NVGPU_CHANNEL_SYNC_PRIV_H */