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Move gk20a/platform_gk20a.h to linux specific directory as common/linux/platform_gk20a.h since this file includes all linux specific stuff Fix #includes in all the files to include this file with correct path Remove #include of this file where it is no more needed Fix gk20a_init_sim_support() to receive struct gk20a as parameter instead of receiving linux specific struct platform_device NVGPU-316 Change-Id: I5ec08e776b753af4d39d11c11f6f068be2ac236f Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1589938 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
240 lines
6.2 KiB
C
240 lines
6.2 KiB
C
/*
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* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#if defined(CONFIG_GK20A_CYCLE_STATS)
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#include <linux/tegra-ivc.h>
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#include <linux/tegra_vgpu.h>
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#include "gk20a/gk20a.h"
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#include "gk20a/channel_gk20a.h"
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#include "gk20a/css_gr_gk20a.h"
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#include "common/linux/platform_gk20a.h"
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#include "vgpu.h"
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#include "css_vgpu.h"
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static struct tegra_hv_ivm_cookie *css_cookie;
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static struct tegra_hv_ivm_cookie *vgpu_css_reserve_mempool(struct gk20a *g)
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{
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struct device *dev = dev_from_gk20a(g);
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struct device_node *np = dev->of_node;
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struct of_phandle_args args;
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struct device_node *hv_np;
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struct tegra_hv_ivm_cookie *cookie;
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u32 mempool;
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int err;
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err = of_parse_phandle_with_fixed_args(np,
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"mempool-css", 1, 0, &args);
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if (err) {
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nvgpu_err(g, "dt missing mempool-css");
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return ERR_PTR(err);
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}
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hv_np = args.np;
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mempool = args.args[0];
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cookie = tegra_hv_mempool_reserve(hv_np, mempool);
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if (IS_ERR_OR_NULL(cookie)) {
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nvgpu_err(g, "mempool %u reserve failed", mempool);
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return ERR_PTR(-EINVAL);
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}
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return cookie;
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}
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u32 vgpu_css_get_buffer_size(struct gk20a *g)
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{
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struct tegra_hv_ivm_cookie *cookie;
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u32 size;
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nvgpu_log_fn(g, " ");
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if (css_cookie) {
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nvgpu_log_info(g, "buffer size = %llu", css_cookie->size);
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return (u32)css_cookie->size;
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}
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cookie = vgpu_css_reserve_mempool(g);
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if (IS_ERR(css_cookie))
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return 0;
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size = cookie->size;
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tegra_hv_mempool_unreserve(cookie);
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nvgpu_log_info(g, "buffer size = %u", size);
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return size;
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}
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static int vgpu_css_init_snapshot_buffer(struct gr_gk20a *gr)
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{
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struct gk20a *g = gr->g;
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struct gk20a_cs_snapshot *data = gr->cs_data;
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void *buf = NULL;
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int err;
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gk20a_dbg_fn("");
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if (data->hw_snapshot)
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return 0;
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css_cookie = vgpu_css_reserve_mempool(g);
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if (IS_ERR(css_cookie))
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return PTR_ERR(css_cookie);
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/* Make sure buffer size is large enough */
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if (css_cookie->size < CSS_MIN_HW_SNAPSHOT_SIZE) {
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nvgpu_info(g, "mempool size %lld too small",
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css_cookie->size);
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err = -ENOMEM;
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goto fail;
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}
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buf = ioremap_cache(css_cookie->ipa, css_cookie->size);
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if (!buf) {
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nvgpu_info(g, "ioremap_cache failed");
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err = -EINVAL;
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goto fail;
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}
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data->hw_snapshot = buf;
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data->hw_end = data->hw_snapshot +
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css_cookie->size / sizeof(struct gk20a_cs_snapshot_fifo_entry);
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data->hw_get = data->hw_snapshot;
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memset(data->hw_snapshot, 0xff, css_cookie->size);
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return 0;
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fail:
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tegra_hv_mempool_unreserve(css_cookie);
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css_cookie = NULL;
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return err;
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}
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void vgpu_css_release_snapshot_buffer(struct gr_gk20a *gr)
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{
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struct gk20a_cs_snapshot *data = gr->cs_data;
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if (!data->hw_snapshot)
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return;
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iounmap(data->hw_snapshot);
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data->hw_snapshot = NULL;
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tegra_hv_mempool_unreserve(css_cookie);
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css_cookie = NULL;
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gk20a_dbg_info("cyclestats(vgpu): buffer for snapshots released\n");
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}
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int vgpu_css_flush_snapshots(struct channel_gk20a *ch,
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u32 *pending, bool *hw_overflow)
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{
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struct gk20a *g = ch->g;
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struct tegra_vgpu_cmd_msg msg = {};
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struct tegra_vgpu_channel_cyclestats_snapshot_params *p;
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struct gr_gk20a *gr = &g->gr;
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struct gk20a_cs_snapshot *data = gr->cs_data;
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int err;
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gk20a_dbg_fn("");
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msg.cmd = TEGRA_VGPU_CMD_CHANNEL_CYCLESTATS_SNAPSHOT;
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msg.handle = vgpu_get_handle(g);
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p = &msg.params.cyclestats_snapshot;
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p->handle = ch->virt_ctx;
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p->subcmd = NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT_CMD_FLUSH;
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p->buf_info = (uintptr_t)data->hw_get - (uintptr_t)data->hw_snapshot;
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err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
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err = (err || msg.ret) ? -1 : 0;
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*pending = p->buf_info;
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*hw_overflow = p->hw_overflow;
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return err;
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}
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static int vgpu_css_attach(struct channel_gk20a *ch,
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struct gk20a_cs_snapshot_client *cs_client)
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{
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struct gk20a *g = ch->g;
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struct tegra_vgpu_cmd_msg msg = {};
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struct tegra_vgpu_channel_cyclestats_snapshot_params *p =
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&msg.params.cyclestats_snapshot;
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int err;
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gk20a_dbg_fn("");
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msg.cmd = TEGRA_VGPU_CMD_CHANNEL_CYCLESTATS_SNAPSHOT;
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msg.handle = vgpu_get_handle(g);
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p->handle = ch->virt_ctx;
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p->subcmd = NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT_CMD_ATTACH;
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p->perfmon_count = cs_client->perfmon_count;
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err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
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err = err ? err : msg.ret;
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if (err)
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nvgpu_err(g, "failed");
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else
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cs_client->perfmon_start = p->perfmon_start;
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return err;
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}
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int vgpu_css_detach(struct channel_gk20a *ch,
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struct gk20a_cs_snapshot_client *cs_client)
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{
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struct gk20a *g = ch->g;
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struct tegra_vgpu_cmd_msg msg = {};
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struct tegra_vgpu_channel_cyclestats_snapshot_params *p =
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&msg.params.cyclestats_snapshot;
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int err;
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gk20a_dbg_fn("");
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msg.cmd = TEGRA_VGPU_CMD_CHANNEL_CYCLESTATS_SNAPSHOT;
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msg.handle = vgpu_get_handle(g);
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p->handle = ch->virt_ctx;
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p->subcmd = NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT_CMD_DETACH;
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p->perfmon_start = cs_client->perfmon_start;
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p->perfmon_count = cs_client->perfmon_count;
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err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
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err = err ? err : msg.ret;
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if (err)
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nvgpu_err(g, "failed");
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return err;
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}
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int vgpu_css_enable_snapshot_buffer(struct channel_gk20a *ch,
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struct gk20a_cs_snapshot_client *cs_client)
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{
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int ret;
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ret = vgpu_css_attach(ch, cs_client);
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if (ret)
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return ret;
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ret = vgpu_css_init_snapshot_buffer(&ch->g->gr);
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return ret;
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}
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#endif /* CONFIG_GK20A_CYCLE_STATS */
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