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MISRA Rule-17.7 requires the return value of all functions to be used. Fix is either to use the return value or change the function to return void. In the case of the pmu_setup_elpg operation, all implementations were always returning 0, so this patch changes the signature to return void instead. JIRA NVGPU-3036 Change-Id: I6f0a79314535ba9e3c65d28399b117b058bb23ca Signed-off-by: Nicolas Benech <nbenech@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2092680 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
40 lines
1.5 KiB
C
40 lines
1.5 KiB
C
/*
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* GV11B PMU
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*
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* Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_PMU_GV11B_H
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#define NVGPU_PMU_GV11B_H
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#include <nvgpu/types.h>
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struct gk20a;
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bool gv11b_is_pmu_supported(struct gk20a *g);
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int gv11b_pmu_bootstrap(struct nvgpu_pmu *pmu);
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void gv11b_pmu_setup_elpg(struct gk20a *g);
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u32 gv11b_pmu_get_irqdest(struct gk20a *g);
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void gv11b_pmu_handle_ext_irq(struct gk20a *g, u32 intr0);
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void gv11b_setup_apertures(struct gk20a *g);
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#endif /* NVGPU_PMU_GV11B_H */
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