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976b4efe64
Add a gops_gin struct for handling chip-specific GIN functionality. For now, it only has the get_intr_ctrl_msg HAL. Each per-unit INTR_CTRL register holds an opaque 32-bit value that determines how an interrupt is routed. The layout of this value is determined by GIN. This HAL allows units to ask GIN how it should program their INTR_CTRL registers. Jira NVGPU-9217 Change-Id: I18f86e09701634bdb39db6b6e4728cd3595caa02 Signed-off-by: Austin Tajiri <atajiri@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2839755 Reviewed-by: Rajesh Devaraj <rdevaraj@nvidia.com> Reviewed-by: Seema Khowala <seemaj@nvidia.com> GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>