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3f08cf8a48
Name the Make and C flag variables consistently wih syntax: CONFIG_NVGPU_<feature name> s/NVGPU_DEBUGGER/CONFIG_NVGPU_DEBUGGER s/NVGPU_CYCLESTATS/CONFIG_NVGPU_CYCLESTATS s/NVGPU_USERD/CONFIG_NVGPU_USERD s/NVGPU_CHANNEL_WDT/CONFIG_NVGPU_CHANNEL_WDT s/NVGPU_FEATURE_CE/CONFIG_NVGPU_CE s/NVGPU_GRAPHICS/CONFIG_NVGPU_GRAPHICS s/NVGPU_ENGINE/CONFIG_NVGPU_FIFO_ENGINE_ACTIVITY s/NVGPU_FEATURE_CHANNEL_TSG_SCHED/CONFIG_NVGPU_CHANNEL_TSG_SCHED s/NVGPU_FEATURE_CHANNEL_TSG_CONTROL/CONFIG_NVGPU_CHANNEL_TSG_CONTROL s/NVGPU_FEATURE_ENGINE_QUEUE/CONFIG_NVGPU_ENGINE_QUEUE s/GK20A_CTXSW_TRACE/CONFIG_NVGPU_FECS_TRACE s/IGPU_VIRT_SUPPORT/CONFIG_NVGPU_IGPU_VIRT s/CONFIG_TEGRA_NVLINK/CONFIG_NVGPU_NVLINK s/NVGPU_DGPU_SUPPORT/CONFIG_NVGPU_DGPU s/NVGPU_VPR/CONFIG_NVGPU_VPR s/NVGPU_REPLAYABLE_FAULT/CONFIG_NVGPU_REPLAYABLE_FAULT s/NVGPU_FEATURE_LS_PMU/CONFIG_NVGPU_LS_PMU s/NVGPU_FEATURE_POWER_PG/CONFIG_NVGPU_POWER_PG JIRA NVGPU-3624 Change-Id: I8b2492b085095fc6ee95926d8f8c3929702a1773 Signed-off-by: Sagar Kamble <skamble@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2130290 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
132 lines
3.3 KiB
C
132 lines
3.3 KiB
C
/*
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* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/gk20a.h>
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#include <nvgpu/firmware.h>
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#include <nvgpu/timers.h>
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#include <nvgpu/nvlink_minion.h>
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#ifdef CONFIG_NVGPU_NVLINK
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/* Extract a WORD from the MINION ucode */
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u32 nvgpu_nvlink_minion_extract_word(struct nvgpu_firmware *fw, u32 idx)
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{
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u32 out_data = 0U;
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u8 byte = 0U;
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u32 i = 0U;
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for (i = 0U; i < 4U; i++) {
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byte = fw->data[idx + i];
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out_data |= ((u32)byte) << (8U * i);
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}
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return out_data;
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}
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/*
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* Load minion FW and set up bootstrap
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*/
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int nvgpu_nvlink_minion_load(struct gk20a *g)
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{
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int err = 0;
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struct nvgpu_firmware *nvgpu_minion_fw = NULL;
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struct nvgpu_timeout timeout;
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u32 delay = POLL_DELAY_MIN_US;
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bool boot_cmplte;
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nvgpu_log_fn(g, " ");
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if (g->ops.nvlink.minion.is_running(g)) {
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return 0;
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}
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/* get mem unlock ucode binary */
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nvgpu_minion_fw = nvgpu_request_firmware(g, "minion.bin", 0);
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if (nvgpu_minion_fw == NULL) {
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nvgpu_err(g, "minion ucode get fail");
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err = -ENOENT;
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goto exit;
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}
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/* Minion reset */
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err = nvgpu_falcon_reset(&g->minion_flcn);
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if (err != 0) {
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nvgpu_err(g, "Minion reset failed");
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goto exit;
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}
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/* Clear interrupts */
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g->ops.nvlink.minion.clear_intr(g);
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err = nvgpu_nvlink_minion_load_ucode(g, nvgpu_minion_fw);
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if (err != 0) {
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goto exit;
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}
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/* set BOOTVEC to start of non-secure code */
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err = nvgpu_falcon_bootstrap(&g->minion_flcn, 0x0);
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if (err != 0) {
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nvgpu_err(g, "Minion bootstrap failed");
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goto exit;
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}
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err = nvgpu_timeout_init(g, &timeout, nvgpu_get_poll_timeout(g),
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NVGPU_TIMER_CPU_TIMER);
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if (err != 0) {
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nvgpu_err(g, "Minion boot timeout init failed");
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goto exit;
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}
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do {
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err = g->ops.nvlink.minion.is_boot_complete(g, &boot_cmplte);
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if (err != 0) {
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goto exit;
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}
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if (boot_cmplte) {
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nvgpu_log(g, gpu_dbg_nvlink,"MINION boot successful");
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break;
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}
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nvgpu_usleep_range(delay, delay * 2U);
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delay = min_t(unsigned int,
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delay << 1, POLL_DELAY_MAX_US);
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} while (nvgpu_timeout_expired_msg(&timeout,
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"minion boot timeout") == 0);
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/* Service interrupts */
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g->ops.nvlink.minion.falcon_isr(g);
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if (nvgpu_timeout_peek_expired(&timeout) != 0) {
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err = -ETIMEDOUT;
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goto exit;
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}
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g->ops.nvlink.minion.init_intr(g);
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return err;
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exit:
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nvgpu_nvlink_free_minion_used_mem(g, nvgpu_minion_fw);
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return err;
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}
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#endif
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