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Rewrite PMU boot sequence as a state machine. At PMU power-up send initial messages, and reset state machine. At each reply from PMU, do the next stage of PMU boot and set state. As now PMU and FECS boot are independent, we need to ensure engine idle before saving ZBC. Change-Id: I1ea747ab794ef08f1784eeabfdae7655d585ff21 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/410205
55 lines
1.4 KiB
C
55 lines
1.4 KiB
C
/*
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* drivers/video/tegra/host/gk20a/hal_gk20a.c
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*
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* GK20A Tegra HAL interface.
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*
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* Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include "hal_gk20a.h"
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#include "ltc_gk20a.h"
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#include "fb_gk20a.h"
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#include "gk20a.h"
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#include "gk20a_gating_reglist.h"
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#include "channel_gk20a.h"
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#include "gr_ctx_gk20a.h"
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#include "mm_gk20a.h"
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struct gpu_ops gk20a_ops = {
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.clock_gating = {
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.slcg_gr_load_gating_prod =
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gr_gk20a_slcg_gr_load_gating_prod,
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.slcg_perf_load_gating_prod =
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gr_gk20a_slcg_perf_load_gating_prod,
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.blcg_gr_load_gating_prod =
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gr_gk20a_blcg_gr_load_gating_prod,
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.pg_gr_load_gating_prod =
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gr_gk20a_pg_gr_load_gating_prod,
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.slcg_therm_load_gating_prod =
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gr_gk20a_slcg_therm_load_gating_prod,
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}
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};
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int gk20a_init_hal(struct gpu_ops *gops)
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{
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*gops = gk20a_ops;
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gk20a_init_ltc(gops);
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gk20a_init_gr_ops(gops);
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gk20a_init_fb(gops);
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gk20a_init_fifo(gops);
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gk20a_init_gr_ctx(gops);
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gk20a_init_mm(gops);
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gops->name = "gk20a";
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return 0;
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}
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