Files
linux-nvgpu/drivers/gpu/nvgpu/gp10b/gp10b.c
Deepak Nibade 8d5536271f gpu: nvgpu: add user API to get a syncpoint
Add new user API NVGPU_IOCTL_CHANNEL_GET_USER_SYNCPOINT which will expose
per-channel allocated syncpoint to user space
API will also return current value of the syncpoint
On supported platforms, this API will also return a RW semaphore address
(corresponding to syncpoint shim) to user space

Add new characteristics flag NVGPU_GPU_FLAGS_SUPPORT_USER_SYNCPOINT to indicate
support for this new API
Add new flag NVGPU_SUPPORT_USER_SYNCPOINT for use of core driver

Set this flag for GV11B and GP10B for now

Add a new API (*syncpt_address) in struct gk20a_channel_sync to get GPU_VA
address of a syncpoint

Add new API nvgpu_nvhost_syncpt_read_maxval() which will read and return MAX
value of syncpoint

Bug 200326065
Jira NVGPU-179

Change-Id: I9da6f17b85996f4fc6731c0bf94fca6f3181c3e0
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1658009
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-02-26 03:48:11 -08:00

122 lines
3.6 KiB
C

/*
* GP10B Graphics
*
* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#include "gk20a/gk20a.h"
#include <nvgpu/enabled.h>
#include "gp10b.h"
#include <nvgpu/hw/gp10b/hw_fuse_gp10b.h>
#include <nvgpu/hw/gp10b/hw_gr_gp10b.h>
static void gp10b_detect_ecc_enabled_units(struct gk20a *g)
{
u32 opt_ecc_en = gk20a_readl(g, fuse_opt_ecc_en_r());
u32 opt_feature_fuses_override_disable =
gk20a_readl(g,
fuse_opt_feature_fuses_override_disable_r());
u32 fecs_feature_override_ecc =
gk20a_readl(g,
gr_fecs_feature_override_ecc_r());
if (opt_feature_fuses_override_disable) {
if (opt_ecc_en) {
__nvgpu_set_enabled(g, NVGPU_ECC_ENABLED_SM_LRF, true);
__nvgpu_set_enabled(g, NVGPU_ECC_ENABLED_SM_SHM, true);
__nvgpu_set_enabled(g, NVGPU_ECC_ENABLED_TEX, true);
__nvgpu_set_enabled(g, NVGPU_ECC_ENABLED_LTC, true);
}
} else {
/* SM LRF */
if (gr_fecs_feature_override_ecc_sm_lrf_override_v(
fecs_feature_override_ecc)) {
if (gr_fecs_feature_override_ecc_sm_lrf_v(
fecs_feature_override_ecc)) {
__nvgpu_set_enabled(g,
NVGPU_ECC_ENABLED_SM_LRF, true);
}
} else {
if (opt_ecc_en) {
__nvgpu_set_enabled(g,
NVGPU_ECC_ENABLED_SM_LRF, true);
}
}
/* SM SHM */
if (gr_fecs_feature_override_ecc_sm_shm_override_v(
fecs_feature_override_ecc)) {
if (gr_fecs_feature_override_ecc_sm_shm_v(
fecs_feature_override_ecc)) {
__nvgpu_set_enabled(g,
NVGPU_ECC_ENABLED_SM_SHM, true);
}
} else {
if (opt_ecc_en) {
__nvgpu_set_enabled(g,
NVGPU_ECC_ENABLED_SM_SHM, true);
}
}
/* TEX */
if (gr_fecs_feature_override_ecc_tex_override_v(
fecs_feature_override_ecc)) {
if (gr_fecs_feature_override_ecc_tex_v(
fecs_feature_override_ecc)) {
__nvgpu_set_enabled(g,
NVGPU_ECC_ENABLED_TEX, true);
}
} else {
if (opt_ecc_en) {
__nvgpu_set_enabled(g,
NVGPU_ECC_ENABLED_TEX, true);
}
}
/* LTC */
if (gr_fecs_feature_override_ecc_ltc_override_v(
fecs_feature_override_ecc)) {
if (gr_fecs_feature_override_ecc_ltc_v(
fecs_feature_override_ecc)) {
__nvgpu_set_enabled(g,
NVGPU_ECC_ENABLED_LTC, true);
}
} else {
if (opt_ecc_en) {
__nvgpu_set_enabled(g,
NVGPU_ECC_ENABLED_LTC, true);
}
}
}
}
int gp10b_init_gpu_characteristics(struct gk20a *g)
{
gk20a_init_gpu_characteristics(g);
gp10b_detect_ecc_enabled_units(g);
__nvgpu_set_enabled(g, NVGPU_SUPPORT_RESCHEDULE_RUNLIST, true);
__nvgpu_set_enabled(g, NVGPU_SUPPORT_USER_SYNCPOINT, true);
return 0;
}