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The device_info table is an array of registers which contain engine specific data for engines like CE, graphics, nvdec, ioctrl etc. These registers contain data like intr_enum, reset_enum, pri_base and so on. The Top unit would include HAL to parse this table and get data for a particular engine. Some engines like CE have multiple entries in the device_info table corresponding to each instance of the engine. Prior to Pascal, each instance of an engine was denoted by different engine type. For example in GM20B, there are engine types like COPY_ENGINE0, COPY_ENGINE1 and so on. In Pascal and chips beyond, a new field called "inst_id" is added and the engine_type is kept the same. For example in GP10B, all copy engine entries have same engine type i.e ENGINE_LCE, but different inst_ids. So for Pascal and chips beyond, add HAL to get number of entries corresponding to an engine type.The "get_device_info" HAL will parse a specific instance of the engine using inst_id argument JIRA NVGPU-1053 Change-Id: Ie3058b1c1bfdd87bfa47e5f037d049d9d50cfc0b Signed-off-by: Tejal Kudav <tkudav@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1969399 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
45 lines
1.8 KiB
C
45 lines
1.8 KiB
C
/*
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* GM20B TOP UNIT
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*
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* Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef TOP_GM20B_H
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#define TOP_GM20B_H
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#include <nvgpu/types.h>
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struct gk20a;
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struct nvgpu_device_info;
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int gm20b_device_info_parse_enum(struct gk20a *g, u32 table_entry,
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u32 *engine_id, u32 *runlist_id,
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u32 *intr_id, u32 *reset_id);
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int gm20b_device_info_parse_data(struct gk20a *g, u32 table_entry, u32 *inst_id,
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u32 *pri_base, u32 *fault_id);
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int gm20b_get_device_info(struct gk20a *g, struct nvgpu_device_info *dev_info,
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u32 engine_type, u32 inst_id);
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bool gm20b_is_engine_gr(struct gk20a *g, u32 engine_type);
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bool gm20b_is_engine_ce(struct gk20a *g, u32 engine_type);
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u32 gm20b_get_ce_inst_id(struct gk20a *g, u32 engine_type);
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#endif
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