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e156066256
The APIs read_vin_cal_slope_intercept_fuse() and read_vin_cal_gain_offset_fuse() where prototyped for u32 return types, but they were actually returning negative errno's for errors. Change the return type to int so the errors can be checked properly. clk_vin.c still stores the return values as u32's. This will be fixed in a future patch. JIRA NVGPU-938 Change-Id: I4fc47468dcf39f923c4f302919c705b50e10f446 Signed-off-by: Philip Elcan <pelcan@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1943383 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
238 lines
6.1 KiB
C
238 lines
6.1 KiB
C
/*
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* GP106 FUSE
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*
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* Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/enabled.h>
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#include <nvgpu/io.h>
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#include <nvgpu/gk20a.h>
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#include "fuse_gp106.h"
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#include <nvgpu/hw/gp106/hw_fuse_gp106.h>
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int gp106_fuse_check_priv_security(struct gk20a *g)
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{
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__nvgpu_set_enabled(g, NVGPU_SEC_PRIVSECURITY, true);
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__nvgpu_set_enabled(g, NVGPU_SEC_SECUREGPCCS, true);
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return 0;
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}
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u32 gp106_fuse_read_vin_cal_fuse_rev(struct gk20a *g)
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{
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return fuse_vin_cal_fuse_rev_data_v(
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gk20a_readl(g, fuse_vin_cal_fuse_rev_r()));
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}
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int gp106_fuse_read_vin_cal_slope_intercept_fuse(struct gk20a *g,
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u32 vin_id, u32 *slope,
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u32 *intercept)
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{
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u32 data = 0;
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u32 interceptdata = 0;
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u32 slopedata = 0;
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u32 gpc0data;
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u32 gpc0slopedata;
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u32 gpc0interceptdata;
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/* read gpc0 irrespective of vin id */
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gpc0data = gk20a_readl(g, fuse_vin_cal_gpc0_r());
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if (gpc0data == 0xFFFFFFFF) {
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return -EINVAL;
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}
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switch (vin_id) {
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case CTRL_CLK_VIN_ID_GPC0:
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break;
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case CTRL_CLK_VIN_ID_GPC1:
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data = gk20a_readl(g, fuse_vin_cal_gpc1_delta_r());
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break;
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case CTRL_CLK_VIN_ID_GPC2:
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data = gk20a_readl(g, fuse_vin_cal_gpc2_delta_r());
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break;
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case CTRL_CLK_VIN_ID_GPC3:
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data = gk20a_readl(g, fuse_vin_cal_gpc3_delta_r());
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break;
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case CTRL_CLK_VIN_ID_GPC4:
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data = gk20a_readl(g, fuse_vin_cal_gpc4_delta_r());
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break;
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case CTRL_CLK_VIN_ID_GPC5:
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data = gk20a_readl(g, fuse_vin_cal_gpc5_delta_r());
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break;
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case CTRL_CLK_VIN_ID_SYS:
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case CTRL_CLK_VIN_ID_XBAR:
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case CTRL_CLK_VIN_ID_LTC:
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data = gk20a_readl(g, fuse_vin_cal_shared_delta_r());
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break;
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case CTRL_CLK_VIN_ID_SRAM:
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data = gk20a_readl(g, fuse_vin_cal_sram_delta_r());
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break;
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default:
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return -EINVAL;
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}
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if (data == 0xFFFFFFFF) {
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return -EINVAL;
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}
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gpc0interceptdata = (fuse_vin_cal_gpc0_icpt_int_data_v(gpc0data) <<
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fuse_vin_cal_gpc0_icpt_frac_data_s()) +
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fuse_vin_cal_gpc0_icpt_frac_data_v(gpc0data);
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gpc0interceptdata = (gpc0interceptdata * 1000U) >>
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fuse_vin_cal_gpc0_icpt_frac_data_s();
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switch (vin_id) {
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case CTRL_CLK_VIN_ID_GPC0:
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break;
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case CTRL_CLK_VIN_ID_GPC1:
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case CTRL_CLK_VIN_ID_GPC2:
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case CTRL_CLK_VIN_ID_GPC3:
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case CTRL_CLK_VIN_ID_GPC4:
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case CTRL_CLK_VIN_ID_GPC5:
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case CTRL_CLK_VIN_ID_SYS:
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case CTRL_CLK_VIN_ID_XBAR:
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case CTRL_CLK_VIN_ID_LTC:
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interceptdata = (fuse_vin_cal_gpc1_delta_icpt_int_data_v(data) <<
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fuse_vin_cal_gpc1_delta_icpt_frac_data_s()) +
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fuse_vin_cal_gpc1_delta_icpt_frac_data_v(data);
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interceptdata = (interceptdata * 1000U) >>
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fuse_vin_cal_gpc1_delta_icpt_frac_data_s();
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break;
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case CTRL_CLK_VIN_ID_SRAM:
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interceptdata = (fuse_vin_cal_sram_delta_icpt_int_data_v(data) <<
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fuse_vin_cal_sram_delta_icpt_frac_data_s()) +
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fuse_vin_cal_sram_delta_icpt_frac_data_v(data);
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interceptdata = (interceptdata * 1000U) >>
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fuse_vin_cal_sram_delta_icpt_frac_data_s();
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break;
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default:
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return -EINVAL;
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}
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if (fuse_vin_cal_gpc1_delta_icpt_sign_data_v(data) != 0U) {
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*intercept = gpc0interceptdata - interceptdata;
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} else {
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*intercept = gpc0interceptdata + interceptdata;
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}
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/* slope */
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gpc0slopedata = (fuse_vin_cal_gpc0_slope_int_data_v(gpc0data) <<
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fuse_vin_cal_gpc0_slope_frac_data_s()) +
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fuse_vin_cal_gpc0_slope_frac_data_v(gpc0data);
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gpc0slopedata = (gpc0slopedata * 1000U) >>
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fuse_vin_cal_gpc0_slope_frac_data_s();
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switch (vin_id) {
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case CTRL_CLK_VIN_ID_GPC0:
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break;
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case CTRL_CLK_VIN_ID_GPC1:
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case CTRL_CLK_VIN_ID_GPC2:
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case CTRL_CLK_VIN_ID_GPC3:
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case CTRL_CLK_VIN_ID_GPC4:
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case CTRL_CLK_VIN_ID_GPC5:
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case CTRL_CLK_VIN_ID_SYS:
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case CTRL_CLK_VIN_ID_XBAR:
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case CTRL_CLK_VIN_ID_LTC:
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case CTRL_CLK_VIN_ID_SRAM:
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slopedata =
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(fuse_vin_cal_gpc1_delta_slope_int_data_v(data)) * 1000;
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break;
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default:
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return -EINVAL;
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}
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if (fuse_vin_cal_gpc1_delta_slope_sign_data_v(data) != 0U) {
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*slope = gpc0slopedata - slopedata;
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} else {
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*slope = gpc0slopedata + slopedata;
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}
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return 0;
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}
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int gp106_fuse_read_vin_cal_gain_offset_fuse(struct gk20a *g,
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u32 vin_id, s8 *gain,
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s8 *offset)
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{
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u32 reg_val = 0;
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u32 data = 0;
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switch (vin_id) {
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case CTRL_CLK_VIN_ID_GPC0:
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reg_val = gk20a_readl(g, fuse_vin_cal_gpc0_r());
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break;
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case CTRL_CLK_VIN_ID_GPC1:
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reg_val = gk20a_readl(g, fuse_vin_cal_gpc1_delta_r());
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break;
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case CTRL_CLK_VIN_ID_GPC2:
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reg_val = gk20a_readl(g, fuse_vin_cal_gpc2_delta_r());
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break;
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case CTRL_CLK_VIN_ID_GPC3:
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reg_val = gk20a_readl(g, fuse_vin_cal_gpc3_delta_r());
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break;
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case CTRL_CLK_VIN_ID_GPC4:
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reg_val = gk20a_readl(g, fuse_vin_cal_gpc4_delta_r());
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break;
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case CTRL_CLK_VIN_ID_GPC5:
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reg_val = gk20a_readl(g, fuse_vin_cal_gpc5_delta_r());
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break;
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case CTRL_CLK_VIN_ID_SYS:
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case CTRL_CLK_VIN_ID_XBAR:
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case CTRL_CLK_VIN_ID_LTC:
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reg_val = gk20a_readl(g, fuse_vin_cal_shared_delta_r());
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break;
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case CTRL_CLK_VIN_ID_SRAM:
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reg_val = gk20a_readl(g, fuse_vin_cal_sram_delta_r());
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break;
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default:
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return -EINVAL;
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}
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if (reg_val == 0xFFFFFFFF) {
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return -EINVAL;
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}
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data = (reg_val >> 16U) & 0x1fU;
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*gain = (s8)data;
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data = reg_val & 0x7fU;
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*offset = (s8)data;
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return 0;
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}
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