Scott Long 4fd8df5ca0 gpu: nvgpu: fix misra 10.5 violations ...

MISRA Advisory Rule 10.5 states that the value of an expression should
not be cast to an inappropriate essential type.

This change eliminates such a violation in the posix implementation
of nvgpu_thread_cleanup_pop().

Jira NVGPU-3178

Change-Id: I2ad363b4d60c321fa20b23c167d783bebaceb7d3
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2298986
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

2020-12-15 14:13:28 -06:00

..

nvgpu

gpu: nvgpu: fix misra 10.5 violations

2020-12-15 14:13:28 -06:00