Philip Elcan 596cf7241f gpu: nvgpu: gr: fix MISRA 10.4 violations ...

MISRA Rule 10.4 requires both operands of an operator in which the
usual arithmetic conversions are performed shall have the same
essential type category.

JIRA NVGPU-3159

Change-Id: I7d864f407feadeb7ffed3922d68830aed777ce6f
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2104522
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

2019-04-26 13:05:42 -07:00

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