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linux-nvgpu/drivers/gpu/nvgpu/common/fifo
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Seema Khowala fb603ef467 gpu: nvgpu: channel MISRA fix for Rule 17.7 
Check return value of below function and add nvgpu_assert
nvgpu_channel_deferred_reset_engines

JIRA NVGPU-3388

Change-Id: I745de9fb618803824ae62ed586944ce5d838c92a
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2115787
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-15 16:47:24 -07:00
..
channel_gk20a.c
gpu: nvgpu: rename tsg_gk20a and channel_gk20a structs
2019-05-06 02:56:53 -07:00
channel_gk20a.h
gpu: nvgpu: rename tsg_gk20a and channel_gk20a structs
2019-05-06 02:56:53 -07:00
channel_gm20b.c
gpu: nvgpu: rename tsg_gk20a and channel_gk20a structs
2019-05-06 02:56:53 -07:00
channel_gm20b.h
gpu: nvgpu: rename tsg_gk20a and channel_gk20a structs
2019-05-06 02:56:53 -07:00
channel_gv11b.c
gpu: nvgpu: rename tsg_gk20a and channel_gk20a structs
2019-05-06 02:56:53 -07:00
channel_gv11b.h
gpu: nvgpu: channel MISRA fix for Rule 8.6
2019-05-09 04:38:53 -07:00
channel_gv100.c
gpu: nvgpu: drop fifo_ in channel HAL names
2019-02-12 17:05:56 -08:00
channel_gv100.h
gpu: nvgpu: drop fifo_ in channel HAL names
2019-02-12 17:05:56 -08:00
channel.c
gpu: nvgpu: channel MISRA fix for Rule 17.7
2019-05-15 16:47:24 -07:00
engine_status.c
gpu: nvgpu: add engine_status_info unit
2019-02-13 14:34:00 -08:00
engines.c
gpu: nvgpu: channel MISRA fix for Rule 21.2
2019-05-09 04:39:34 -07:00
fifo.c
gpu: nvgpu: rename struct fifo_gk20a
2019-05-03 16:25:43 -07:00
pbdma_status.c
gpu: nvgpu: add pbdma_status unit
2019-02-19 04:17:00 -08:00
pbdma.c
gpu: nvgpu: rename struct fifo_gk20a
2019-05-03 16:25:43 -07:00
preempt.c
gpu: nvgpu: rename tsg_gk20a and channel_gk20a structs
2019-05-06 02:56:53 -07:00
runlist.c
gpu: nvgpu: rename tsg_gk20a and channel_gk20a structs
2019-05-06 02:56:53 -07:00
submit.c
gpu: nvgpu: channel MISRA fix for Rule 17.7
2019-05-15 16:47:14 -07:00
tsg.c
gpu: nvgpu: channel MISRA fix for Rule 21.2
2019-05-09 04:39:34 -07:00
userd.c
gpu: nvgpu: rename tsg_gk20a and channel_gk20a structs
2019-05-06 02:56:53 -07:00