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877e20838c
Currently DVCO Min is set to 0 in VBIOS. This is causing few boards in GVS to fail when it tries to program min gpcclk freq for dgpu using post divider. This patch makes 405MHz is the lowest gpcclk freq instead of 0. Once VBIOS is updated with 405MHz min freq this fix can be reverted. Bug 3032643 Change-Id: I880c4d2b835cfee87d117010be12a91c64e9cd23 Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2367461 Signed-off-by: Prateek sethi <prsethi@nvidia.com> (cherry picked from commit d3061891ee031059ce791b34f5e40f969db0d89e) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2370512 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com> Reviewed-by: automaticguardword <automaticguardword@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>