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git://nv-tegra.nvidia.com/linux-nvgpu.git
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ac98827c9d
LTC register write is followed by a register read and if data doesn't match code will report the error. Renamed existing nvgpu_writel_check function as nvgpu_writel_loop as it loops until the write get success. nvgpu_writel_check function write and read back and compare the data. Bug 2039150 Change-Id: I0a49be36aad23936f2d58aa82872710827da1d32 Signed-off-by: Vinod G <vinodg@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1762344 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
88 lines
2.0 KiB
C
88 lines
2.0 KiB
C
/*
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* Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/io.h>
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#include <nvgpu/io_usermode.h>
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#include <nvgpu/bug.h>
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/*
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* For now none of these make sense to execute in userspace. Eventually we
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* may want to use these to verify certain register read/write sequences
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* but for now, just hang.
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*/
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void nvgpu_writel(struct gk20a *g, u32 r, u32 v)
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{
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BUG();
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}
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void nvgpu_writel_relaxed(struct gk20a *g, u32 r, u32 v)
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{
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BUG();
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}
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u32 nvgpu_readl(struct gk20a *g, u32 r)
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{
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BUG();
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return 0;
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}
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u32 __nvgpu_readl(struct gk20a *g, u32 r)
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{
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BUG();
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return 0;
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}
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void nvgpu_writel_loop(struct gk20a *g, u32 r, u32 v)
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{
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BUG();
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}
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void nvgpu_bar1_writel(struct gk20a *g, u32 b, u32 v)
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{
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BUG();
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}
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u32 nvgpu_bar1_readl(struct gk20a *g, u32 b)
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{
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BUG();
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return 0;
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}
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bool nvgpu_io_exists(struct gk20a *g)
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{
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return false;
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}
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bool nvgpu_io_valid_reg(struct gk20a *g, u32 r)
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{
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return false;
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}
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void nvgpu_usermode_writel(struct gk20a *g, u32 r, u32 v)
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{
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BUG();
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}
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