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e8486f0b25
Some of the engine queue related defines are shared by PMU, SEC2 and queue implementations and currently in gpmuif_cmn.h. Let us add engine_queue.h header file to club all those defines together. JIRA NVGPU-1994 Change-Id: I57a889e6d14d954d2660e513994bb87cbb1e5824 Signed-off-by: Sagar Kamble <skamble@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2019414 GVS: Gerrit_Virtual_Submit Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
40 lines
1.4 KiB
C
40 lines
1.4 KiB
C
/*
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* Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_ENGINE_QUEUE_H
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#define NVGPU_ENGINE_QUEUE_H
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/* Queue Type */
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#define QUEUE_TYPE_DMEM 0x0U
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#define QUEUE_TYPE_EMEM 0x1U
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#define QUEUE_TYPE_FB 0x2U
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#define OFLAG_READ 0U
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#define OFLAG_WRITE 1U
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#define QUEUE_SET (true)
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#define QUEUE_GET (false)
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#define QUEUE_ALIGNMENT (4U)
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#endif /* NVGPU_ENGINE_QUEUE_H */
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