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fail RW map request with RO nvmap dmabuf. Bug 200630384 Change-Id: Ic18d348d30a638cd6cb098e9228f470809dbea42 Signed-off-by: Sagar Kamble <skamble@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2376131 Reviewed-by: automaticguardword <automaticguardword@nvidia.com> Reviewed-by: Lakshmanan M <lm@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
370 lines
9.8 KiB
C
370 lines
9.8 KiB
C
/*
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* Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/dma-buf.h>
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#include <linux/scatterlist.h>
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#include <uapi/linux/nvgpu.h>
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#include <nvgpu/log.h>
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#include <nvgpu/lock.h>
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#include <nvgpu/rbtree.h>
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#include <nvgpu/vm_area.h>
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#include <nvgpu/nvgpu_mem.h>
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#include <nvgpu/nvgpu_sgt.h>
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#include <nvgpu/page_allocator.h>
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#include <nvgpu/vidmem.h>
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#include <nvgpu/utils.h>
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#include <nvgpu/gk20a.h>
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#include <nvgpu/linux/vm.h>
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#include <nvgpu/linux/nvgpu_mem.h>
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#include "platform_gk20a.h"
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#include "os_linux.h"
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#include "dmabuf_priv.h"
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#include "dmabuf_vidmem.h"
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#define dev_from_vm(vm) dev_from_gk20a(vm->mm->g)
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static u32 nvgpu_vm_translate_linux_flags(struct gk20a *g, u32 flags)
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{
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u32 core_flags = 0;
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if (flags & NVGPU_AS_MAP_BUFFER_FLAGS_FIXED_OFFSET)
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core_flags |= NVGPU_VM_MAP_FIXED_OFFSET;
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if (flags & NVGPU_AS_MAP_BUFFER_FLAGS_CACHEABLE)
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core_flags |= NVGPU_VM_MAP_CACHEABLE;
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if (flags & NVGPU_AS_MAP_BUFFER_FLAGS_IO_COHERENT)
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core_flags |= NVGPU_VM_MAP_IO_COHERENT;
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if (flags & NVGPU_AS_MAP_BUFFER_FLAGS_UNMAPPED_PTE)
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core_flags |= NVGPU_VM_MAP_UNMAPPED_PTE;
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if (flags & NVGPU_AS_MAP_BUFFER_FLAGS_L3_ALLOC)
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core_flags |= NVGPU_VM_MAP_L3_ALLOC;
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if (flags & NVGPU_AS_MAP_BUFFER_FLAGS_DIRECT_KIND_CTRL)
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core_flags |= NVGPU_VM_MAP_DIRECT_KIND_CTRL;
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if (flags & NVGPU_AS_MAP_BUFFER_FLAGS_PLATFORM_ATOMIC)
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core_flags |= NVGPU_VM_MAP_PLATFORM_ATOMIC;
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if (flags & NVGPU_AS_MAP_BUFFER_FLAGS_ACCESS_NO_WRITE)
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core_flags |= NVGPU_VM_MAP_ACCESS_NO_WRITE;
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if (flags & NVGPU_AS_MAP_BUFFER_FLAGS_MAPPABLE_COMPBITS)
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nvgpu_warn(g, "Ignoring deprecated flag: "
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"NVGPU_AS_MAP_BUFFER_FLAGS_MAPPABLE_COMPBITS");
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return core_flags;
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}
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static struct nvgpu_mapped_buf *nvgpu_vm_find_mapped_buf_reverse(
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struct vm_gk20a *vm, struct dma_buf *dmabuf, s16 kind)
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{
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struct nvgpu_rbtree_node *node = NULL;
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struct nvgpu_rbtree_node *root = vm->mapped_buffers;
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nvgpu_rbtree_enum_start(0, &node, root);
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while (node) {
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struct nvgpu_mapped_buf *mapped_buffer =
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mapped_buffer_from_rbtree_node(node);
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if (mapped_buffer->os_priv.dmabuf == dmabuf &&
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mapped_buffer->kind == kind)
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return mapped_buffer;
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nvgpu_rbtree_enum_next(&node, node);
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}
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return NULL;
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}
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int nvgpu_vm_find_buf(struct vm_gk20a *vm, u64 gpu_va,
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struct dma_buf **dmabuf,
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u64 *offset)
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{
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struct nvgpu_mapped_buf *mapped_buffer;
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struct gk20a *g = gk20a_from_vm(vm);
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nvgpu_log_fn(g, "gpu_va=0x%llx", gpu_va);
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nvgpu_mutex_acquire(&vm->update_gmmu_lock);
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mapped_buffer = nvgpu_vm_find_mapped_buf_range(vm, gpu_va);
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if (!mapped_buffer) {
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nvgpu_mutex_release(&vm->update_gmmu_lock);
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return -EINVAL;
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}
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*dmabuf = mapped_buffer->os_priv.dmabuf;
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*offset = gpu_va - mapped_buffer->addr;
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nvgpu_mutex_release(&vm->update_gmmu_lock);
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return 0;
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}
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u64 nvgpu_os_buf_get_size(struct nvgpu_os_buffer *os_buf)
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{
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return os_buf->dmabuf->size;
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}
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/*
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* vm->update_gmmu_lock must be held. This checks to see if we already have
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* mapped the passed buffer into this VM. If so, just return the existing
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* mapping address.
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*/
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struct nvgpu_mapped_buf *nvgpu_vm_find_mapping(struct vm_gk20a *vm,
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struct nvgpu_os_buffer *os_buf,
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u64 map_addr,
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u32 flags,
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s16 kind)
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{
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struct gk20a *g = gk20a_from_vm(vm);
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struct nvgpu_mapped_buf *mapped_buffer = NULL;
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if (flags & NVGPU_VM_MAP_FIXED_OFFSET) {
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mapped_buffer = nvgpu_vm_find_mapped_buf(vm, map_addr);
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if (!mapped_buffer)
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return NULL;
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if (mapped_buffer->os_priv.dmabuf != os_buf->dmabuf ||
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mapped_buffer->kind != kind)
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return NULL;
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} else {
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mapped_buffer =
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nvgpu_vm_find_mapped_buf_reverse(vm,
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os_buf->dmabuf,
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kind);
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if (!mapped_buffer)
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return NULL;
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}
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if (mapped_buffer->flags != flags)
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return NULL;
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nvgpu_log(g, gpu_dbg_map,
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"gv: 0x%04x_%08x + 0x%-7zu "
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"[dma: 0x%010llx, pa: 0x%010llx] "
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"pgsz=%-3dKb as=%-2d "
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"flags=0x%x apt=%s (reused)",
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u64_hi32(mapped_buffer->addr), u64_lo32(mapped_buffer->addr),
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os_buf->dmabuf->size,
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(u64)sg_dma_address(mapped_buffer->os_priv.sgt->sgl),
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(u64)sg_phys(mapped_buffer->os_priv.sgt->sgl),
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vm->gmmu_page_sizes[mapped_buffer->pgsz_idx] >> 10,
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vm_aspace_id(vm),
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mapped_buffer->flags,
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nvgpu_aperture_str(gk20a_dmabuf_aperture(g, os_buf->dmabuf)));
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/*
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* If we find the mapping here then that means we have mapped it already
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* and the prior pin and get must be undone.
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* The SGT is reused in the case of the dmabuf supporting drvdata. When
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* the dmabuf doesn't support drvdata, prior SGT is unpinned as the
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* new SGT was pinned at the beginning of the current map call.
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*/
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nvgpu_mm_unpin(os_buf->dev, os_buf->dmabuf,
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mapped_buffer->os_priv.attachment,
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mapped_buffer->os_priv.sgt);
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dma_buf_put(os_buf->dmabuf);
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return mapped_buffer;
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}
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int nvgpu_vm_map_linux(struct vm_gk20a *vm,
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struct dma_buf *dmabuf,
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u64 map_addr,
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u32 flags,
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u32 page_size,
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s16 compr_kind,
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s16 incompr_kind,
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u64 buffer_offset,
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u64 mapping_size,
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struct vm_gk20a_mapping_batch *batch,
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u64 *gpu_va)
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{
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enum gk20a_mem_rw_flag rw_flag = gk20a_mem_flag_none;
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struct gk20a *g = gk20a_from_vm(vm);
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struct device *dev = dev_from_gk20a(g);
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struct nvgpu_os_buffer os_buf;
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struct sg_table *sgt;
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struct nvgpu_sgt *nvgpu_sgt = NULL;
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struct nvgpu_mapped_buf *mapped_buffer = NULL;
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struct dma_buf_attachment *attachment;
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int err = 0;
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nvgpu_log(g, gpu_dbg_map, "dmabuf file mode: 0x%x mapping flags: 0x%x",
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dmabuf->file->f_mode, flags);
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if (!(dmabuf->file->f_mode & (FMODE_WRITE | FMODE_PWRITE)) &&
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!(flags & NVGPU_VM_MAP_ACCESS_NO_WRITE)) {
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nvgpu_err(g, "RW access requested for RO mapped buffer");
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return -EINVAL;
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}
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sgt = nvgpu_mm_pin(dev, dmabuf, &attachment);
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if (IS_ERR(sgt)) {
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nvgpu_warn(g, "Failed to pin dma_buf!");
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return PTR_ERR(sgt);
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}
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os_buf.dmabuf = dmabuf;
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os_buf.attachment = attachment;
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os_buf.dev = dev;
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if (gk20a_dmabuf_aperture(g, dmabuf) == APERTURE_INVALID) {
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err = -EINVAL;
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goto clean_up;
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}
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nvgpu_sgt = nvgpu_linux_sgt_create(g, sgt);
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if (!nvgpu_sgt) {
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err = -ENOMEM;
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goto clean_up;
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}
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if (flags & NVGPU_VM_MAP_ACCESS_NO_WRITE) {
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rw_flag = gk20a_mem_flag_read_only;
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}
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err = nvgpu_vm_map(vm,
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&os_buf,
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nvgpu_sgt,
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map_addr,
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mapping_size,
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buffer_offset,
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rw_flag,
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flags,
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compr_kind,
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incompr_kind,
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batch,
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gk20a_dmabuf_aperture(g, dmabuf),
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&mapped_buffer);
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nvgpu_sgt_free(g, nvgpu_sgt);
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if (err != 0) {
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goto clean_up;
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}
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mapped_buffer->os_priv.dmabuf = dmabuf;
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mapped_buffer->os_priv.attachment = attachment;
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mapped_buffer->os_priv.sgt = sgt;
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*gpu_va = mapped_buffer->addr;
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return 0;
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clean_up:
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nvgpu_mm_unpin(dev, dmabuf, attachment, sgt);
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return err;
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}
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int nvgpu_vm_map_buffer(struct vm_gk20a *vm,
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int dmabuf_fd,
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u64 *map_addr,
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u32 flags, /*NVGPU_AS_MAP_BUFFER_FLAGS_*/
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u32 page_size,
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s16 compr_kind,
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s16 incompr_kind,
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u64 buffer_offset,
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u64 mapping_size,
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struct vm_gk20a_mapping_batch *batch)
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{
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struct gk20a *g = gk20a_from_vm(vm);
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struct dma_buf *dmabuf;
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u64 ret_va;
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int err = 0;
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/* get ref to the mem handle (released on unmap_locked) */
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dmabuf = dma_buf_get(dmabuf_fd);
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if (IS_ERR(dmabuf)) {
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nvgpu_warn(g, "%s: fd %d is not a dmabuf",
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__func__, dmabuf_fd);
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return PTR_ERR(dmabuf);
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}
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/*
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* For regular maps we do not accept either an input address or a
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* buffer_offset.
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*/
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if (!(flags & NVGPU_AS_MAP_BUFFER_FLAGS_FIXED_OFFSET) &&
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(buffer_offset || *map_addr)) {
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nvgpu_err(g,
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"Regular map with addr/buf offset is not supported!");
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dma_buf_put(dmabuf);
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return -EINVAL;
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}
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/*
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* Map size is always buffer size for non fixed mappings. As such map
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* size should be left as zero by userspace for non-fixed maps.
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*/
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if (mapping_size && !(flags & NVGPU_AS_MAP_BUFFER_FLAGS_FIXED_OFFSET)) {
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nvgpu_err(g, "map_size && non-fixed-mapping!");
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dma_buf_put(dmabuf);
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return -EINVAL;
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}
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/* verify that we're not overflowing the buffer, i.e.
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* (buffer_offset + mapping_size) > dmabuf->size.
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*
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* Since buffer_offset + mapping_size could overflow, first check
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* that mapping size < dmabuf_size, at which point we can subtract
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* mapping_size from both sides for the final comparison.
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*/
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if ((mapping_size > dmabuf->size) ||
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(buffer_offset > (dmabuf->size - mapping_size))) {
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nvgpu_err(g,
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"buf size %llx < (offset(%llx) + map_size(%llx))",
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(u64)dmabuf->size, buffer_offset, mapping_size);
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dma_buf_put(dmabuf);
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return -EINVAL;
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}
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err = nvgpu_vm_map_linux(vm, dmabuf, *map_addr,
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nvgpu_vm_translate_linux_flags(g, flags),
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page_size,
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compr_kind, incompr_kind,
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buffer_offset,
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mapping_size,
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batch,
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&ret_va);
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if (!err)
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*map_addr = ret_va;
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else
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dma_buf_put(dmabuf);
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return err;
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}
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/*
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* This is the function call-back for freeing OS specific components of an
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* nvgpu_mapped_buf. This should most likely never be called outside of the
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* core MM framework!
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*
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* Note: the VM lock will be held.
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*/
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void nvgpu_vm_unmap_system(struct nvgpu_mapped_buf *mapped_buffer)
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{
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struct vm_gk20a *vm = mapped_buffer->vm;
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nvgpu_mm_unpin(dev_from_vm(vm), mapped_buffer->os_priv.dmabuf,
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mapped_buffer->os_priv.attachment,
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mapped_buffer->os_priv.sgt);
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dma_buf_put(mapped_buffer->os_priv.dmabuf);
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}
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