Files
linux-nvgpu/drivers/gpu/nvgpu/common/vgpu/debugger_vgpu.h
Philip Elcan 191aeb5cf8 gpu: nvgpu: regops: u32 num_ops for exec_regops
The exec_regops() API was using a u64 for the num_ops parameter. The
lower level APIs used by exec_regops() expect u32s for this value.
Update the interface to use u32.

This eliminates MISRA Rule 10.3 violations for assignment of objects of
different essential or narrower types.

JIRA: NVGPU-3023

Change-Id: I5a2a22916f81d8b3d882d224d07eedffcde1e3ee
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2084207
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-04-01 15:55:14 -07:00

51 lines
2.0 KiB
C

/*
* Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef NVGPU_DBG_VGPU_H
#define NVGPU_DBG_VGPU_H
struct dbg_session_gk20a;
struct nvgpu_dbg_reg_op;
struct dbg_profiler_object_data;
struct gk20a;
struct channel_gk20a;
int vgpu_exec_regops(struct gk20a *g,
struct channel_gk20a *ch,
struct nvgpu_dbg_reg_op *ops,
u32 num_ops,
bool is_profiler,
bool *is_current_ctx);
int vgpu_dbg_set_powergate(struct dbg_session_gk20a *dbg_s,
bool disable_powergate);
bool vgpu_check_and_set_global_reservation(
struct dbg_session_gk20a *dbg_s,
struct dbg_profiler_object_data *prof_obj);
bool vgpu_check_and_set_context_reservation(
struct dbg_session_gk20a *dbg_s,
struct dbg_profiler_object_data *prof_obj);
void vgpu_release_profiler_reservation(
struct dbg_session_gk20a *dbg_s,
struct dbg_profiler_object_data *prof_obj);
#endif /* NVGPU_DBG_VGPU_H */