nv-tegra-mirror/linux-nvgpu
1
0
Fork 0
mirror of git://nv-tegra.nvidia.com/linux-nvgpu.git synced 2025-12-22 09:12:24 +03:00
Code Issues Packages Projects Releases Wiki Activity

gpu: nvgpu: regops: u32 num_ops for exec_regops

Browse Source 
The exec_regops() API was using a u64 for the num_ops parameter. The
lower level APIs used by exec_regops() expect u32s for this value.
Update the interface to use u32.

This eliminates MISRA Rule 10.3 violations for assignment of objects of
different essential or narrower types.

JIRA: NVGPU-3023

Change-Id: I5a2a22916f81d8b3d882d224d07eedffcde1e3ee
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2084207
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Philip Elcan
2019-03-28 16:31:52 -04:00
committed by mobile promotions
parent 3c83b44544
commit 191aeb5cf8
6 changed files with 7 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/nvgpu/common/regops/regops.c
View File

@@ -86,7 +86,7 @@ static bool validate_reg_ops(struct gk20a *g,
int exec_regops_gk20a(struct gk20a *g,
struct channel_gk20a *ch,
struct nvgpu_dbg_reg_op *ops,
u64 num_ops,
u32 num_ops,
bool is_profiler,
bool *is_current_ctx)
{

2
drivers/gpu/nvgpu/common/vgpu/debugger_vgpu.c
View File

@@ -35,7 +35,7 @@
int vgpu_exec_regops(struct gk20a *g,
struct channel_gk20a *ch,
struct nvgpu_dbg_reg_op *ops,
u64 num_ops,
u32 num_ops,
bool is_profiler,
bool *is_current_ctx)
{

2
drivers/gpu/nvgpu/common/vgpu/debugger_vgpu.h
View File

@@ -32,7 +32,7 @@ struct channel_gk20a;
int vgpu_exec_regops(struct gk20a *g,
struct channel_gk20a *ch,
struct nvgpu_dbg_reg_op *ops,
u64 num_ops,
u32 num_ops,
bool is_profiler,
bool *is_current_ctx);
int vgpu_dbg_set_powergate(struct dbg_session_gk20a *dbg_s,

2
drivers/gpu/nvgpu/include/nvgpu/gk20a.h
View File

@@ -1479,7 +1479,7 @@ struct gpu_ops {
int (*exec_regops)(struct gk20a *g,
struct channel_gk20a *ch,
struct nvgpu_dbg_reg_op *ops,
u64 num_ops,
u32 num_ops,
bool is_profiler,
bool *is_current_ctx);
const struct regop_offset_range* (

2
drivers/gpu/nvgpu/include/nvgpu/regops.h
View File

@@ -78,7 +78,7 @@ struct regop_offset_range {
int exec_regops_gk20a(struct gk20a *g,
struct channel_gk20a *ch,
struct nvgpu_dbg_reg_op *ops,
u64 num_ops,
u32 num_ops,
bool is_profiler,
bool *is_current_ctx);

4
drivers/gpu/nvgpu/os/linux/ioctl_dbg.c
View File

@@ -857,7 +857,7 @@ static int nvgpu_ioctl_channel_reg_ops(struct dbg_session_gk20a *dbg_s,
return -ENOMEM;
while (ops_offset < args->num_ops && !err) {
const u64 num_ops =
const u32 num_ops =
min(args->num_ops - ops_offset,
(u64)(g->dbg_regops_tmp_buf_ops));
const u64 fragment_size =
@@ -868,7 +868,7 @@ static int nvgpu_ioctl_channel_reg_ops(struct dbg_session_gk20a *dbg_s,
(args->ops +
ops_offset * sizeof(struct nvgpu_dbg_gpu_reg_op));
nvgpu_log_fn(g, "Regops fragment: start_op=%llu ops=%llu",
nvgpu_log_fn(g, "Regops fragment: start_op=%llu ops=%u",
ops_offset, num_ops);
nvgpu_log_fn(g, "Copying regops from userspace");