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b8efd9d045
Refactor the sync_debugfs LTC HAL op so that the logic to enable or disable LTC goes to common code nvgpu_ltc_sync_enabled() and the LTC HAL set_enabled only performs the hardware register access. Create a new common function nvgpu_init_ltc_support() to initialize the LTC software variable, and move hardware initialization of LTC to be called from it. JIRA NVGPU-62 Change-Id: Ib1cf4f5b83ca3dac08407464ed56a732e0a33923 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1528262 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
41 lines
1.2 KiB
C
41 lines
1.2 KiB
C
/*
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* GK20A L2
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*
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* Copyright (c) 2011-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <nvgpu/dma.h>
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#include "gk20a.h"
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#include "gr_gk20a.h"
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int gk20a_ltc_alloc_phys_cbc(struct gk20a *g, size_t compbit_backing_size)
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{
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struct gr_gk20a *gr = &g->gr;
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return nvgpu_dma_alloc_flags_sys(g, NVGPU_DMA_FORCE_CONTIGUOUS,
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compbit_backing_size,
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&gr->compbit_store.mem);
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}
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int gk20a_ltc_alloc_virt_cbc(struct gk20a *g, size_t compbit_backing_size)
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{
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struct gr_gk20a *gr = &g->gr;
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return nvgpu_dma_alloc_flags_sys(g, NVGPU_DMA_NO_KERNEL_MAPPING,
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compbit_backing_size,
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&gr->compbit_store.mem);
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}
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