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Reorganize HAL initialization to remove inheritance and construct the gpu_ops struct at compile time. This patch only covers the mc sub-module of the gpu_ops struct. Perform HAL function assignments in hal_gxxxx.c through the population of a chip-specific copy of gpu_ops. Jira NVGPU-74 Change-Id: I26d74c14661a193af7e8d90dd672b73010e5f841 Signed-off-by: Sunny He <suhe@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1509601 GVS: Gerrit_Virtual_Submit Reviewed-by: Richard Zhao <rizhao@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
38 lines
1.2 KiB
C
38 lines
1.2 KiB
C
/*
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* Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef MC_GP20B_H
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#define MC_GP20B_H
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struct gk20a;
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enum MC_INTERRUPT_REGLIST {
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NVGPU_MC_INTR_STALLING = 0,
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NVGPU_MC_INTR_NONSTALLING,
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};
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void mc_gp10b_intr_enable(struct gk20a *g);
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void mc_gp10b_intr_unit_config(struct gk20a *g, bool enable,
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bool is_stalling, u32 mask);
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void mc_gp10b_isr_stall(struct gk20a *g);
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bool mc_gp10b_is_intr1_pending(struct gk20a *g,
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enum nvgpu_unit unit, u32 mc_intr_1);
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u32 mc_gp10b_intr_stall(struct gk20a *g);
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void mc_gp10b_intr_stall_pause(struct gk20a *g);
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void mc_gp10b_intr_stall_resume(struct gk20a *g);
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u32 mc_gp10b_intr_nonstall(struct gk20a *g);
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void mc_gp10b_intr_nonstall_pause(struct gk20a *g);
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void mc_gp10b_intr_nonstall_resume(struct gk20a *g);
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#endif
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