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Currently, we need to include the MC hardware header in nvlink file to generate reset mask. We can use the reset_enum present in DEVICE_INFO table's IOCTRL entry which is meant to index into NV_PMC_ENABLE_DEVICE register bitfields. This allows us to not #include the MC hardware header in nvlink IP file. JIRA NVGPU-966 Change-Id: I037498038b12f795ee444916fb586355ebf04bb3 Signed-off-by: Tejal Kudav <tkudav@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1796819 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>