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e445b57b04
This is one of the steps in restructuring of interrupt code. - Move ISR logic to common code. This will allow us to add mixed ASIL error handling levels. - Modify nonstall ISR to use threaded interrupts. Bottom half of nonstall ISR will run nonstall operations instead of adding work to workqueues. - Remove nonstall workqueue implementation. JIRA NVGPU-6351 Change-Id: I5f891b0de4b0c34f6ac05522a5da08dc36221aa6 Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2467713 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
46 lines
1.1 KiB
C
46 lines
1.1 KiB
C
/*
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* Copyright (c) 2014-2021, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include <nvgpu/trace.h>
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#include <nvgpu/gk20a.h>
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void nvgpu_trace_intr_thread_stall_start(struct gk20a *g)
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{
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#ifdef CONFIG_NVGPU_TRACE
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trace_mc_gk20a_intr_thread_stall(g->name);
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#endif
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}
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void nvgpu_trace_intr_thread_stall_done(struct gk20a *g)
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{
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#ifdef CONFIG_NVGPU_TRACE
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trace_mc_gk20a_intr_thread_stall_done(g->name);
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#endif
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}
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void nvgpu_trace_intr_stall_start(struct gk20a *g)
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{
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#ifdef CONFIG_NVGPU_TRACE
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trace_mc_gk20a_intr_stall(g->name);
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#endif
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}
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void nvgpu_trace_intr_stall_done(struct gk20a *g)
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{
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#ifdef CONFIG_NVGPU_TRACE
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trace_mc_gk20a_intr_stall_done(g->name);
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#endif
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}
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