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Move the gp10b HW headers to a new directory specially for them: include/nvgpu/hw/gp10b And change the code to include like so: #include <nvgpu/hw/gp10b/hw_fb_gp10b.h> This is part of the process to restructure the nvgpu driver. Bug 1799159 Change-Id: Ic80ea5b7f5c280839e502e2178a345181f7a7ef9 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1280326 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
154 lines
4.3 KiB
C
154 lines
4.3 KiB
C
/*
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* GP10B RPFB
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*
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* Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include <linux/pm_runtime.h>
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#include <linux/dma-mapping.h>
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#include "gk20a/gk20a.h"
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#include "rpfb_gp10b.h"
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#include <nvgpu/hw/gp10b/hw_fifo_gp10b.h>
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#include <nvgpu/hw/gp10b/hw_fb_gp10b.h>
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#include <nvgpu/hw/gp10b/hw_bus_gp10b.h>
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#include <nvgpu/hw/gp10b/hw_gmmu_gp10b.h>
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int gp10b_replayable_pagefault_buffer_init(struct gk20a *g)
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{
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u32 addr_lo;
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u32 addr_hi;
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struct vm_gk20a *vm = &g->mm.bar2.vm;
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int err;
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size_t rbfb_size = NV_UVM_FAULT_BUF_SIZE *
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fifo_replay_fault_buffer_size_hw_entries_v();
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gk20a_dbg_fn("");
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if (!g->mm.bar2_desc.gpu_va) {
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err = gk20a_gmmu_alloc_map_sys(vm, rbfb_size,
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&g->mm.bar2_desc);
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if (err) {
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dev_err(dev_from_gk20a(g),
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"%s Error in replayable fault buffer\n", __func__);
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return err;
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}
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}
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addr_lo = u64_lo32(g->mm.bar2_desc.gpu_va >> 12);
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addr_hi = u64_hi32(g->mm.bar2_desc.gpu_va);
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gk20a_writel(g, fifo_replay_fault_buffer_hi_r(),
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fifo_replay_fault_buffer_hi_base_f(addr_hi));
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gk20a_writel(g, fifo_replay_fault_buffer_lo_r(),
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fifo_replay_fault_buffer_lo_base_f(addr_lo) |
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fifo_replay_fault_buffer_lo_enable_true_v());
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gk20a_dbg_fn("done");
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return 0;
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}
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void gp10b_replayable_pagefault_buffer_deinit(struct gk20a *g)
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{
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struct vm_gk20a *vm = &g->mm.bar2.vm;
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gk20a_gmmu_unmap_free(vm, &g->mm.bar2_desc);
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}
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u32 gp10b_replayable_pagefault_buffer_get_index(struct gk20a *g)
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{
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u32 get_idx = 0;
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gk20a_dbg_fn("");
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get_idx = gk20a_readl(g, fifo_replay_fault_buffer_get_r());
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if (get_idx >= fifo_replay_fault_buffer_size_hw_entries_v())
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dev_err(dev_from_gk20a(g), "%s Error in replayable fault buffer\n",
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__func__);
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gk20a_dbg_fn("done");
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return get_idx;
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}
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u32 gp10b_replayable_pagefault_buffer_put_index(struct gk20a *g)
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{
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u32 put_idx = 0;
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gk20a_dbg_fn("");
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put_idx = gk20a_readl(g, fifo_replay_fault_buffer_put_r());
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if (put_idx >= fifo_replay_fault_buffer_size_hw_entries_v())
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dev_err(dev_from_gk20a(g), "%s Error in UVM\n",
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__func__);
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gk20a_dbg_fn("done");
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return put_idx;
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}
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bool gp10b_replayable_pagefault_buffer_is_empty(struct gk20a *g)
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{
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u32 get_idx = gk20a_readl(g, fifo_replay_fault_buffer_get_r());
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u32 put_idx = gk20a_readl(g, fifo_replay_fault_buffer_put_r());
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return (get_idx == put_idx ? true : false);
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}
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bool gp10b_replayable_pagefault_buffer_is_full(struct gk20a *g)
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{
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u32 get_idx = gk20a_readl(g, fifo_replay_fault_buffer_get_r());
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u32 put_idx = gk20a_readl(g, fifo_replay_fault_buffer_put_r());
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u32 hw_entries = gk20a_readl(g, fifo_replay_fault_buffer_size_r());
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return (get_idx == ((put_idx + 1) % hw_entries) ? true : false);
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}
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bool gp10b_replayable_pagefault_buffer_is_overflow(struct gk20a *g)
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{
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u32 info = gk20a_readl(g, fifo_replay_fault_buffer_info_r());
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return fifo_replay_fault_buffer_info_overflow_f(info);
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}
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void gp10b_replayable_pagefault_buffer_clear_overflow(struct gk20a *g)
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{
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u32 info = gk20a_readl(g, fifo_replay_fault_buffer_info_r());
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info |= fifo_replay_fault_buffer_info_overflow_clear_v();
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gk20a_writel(g, fifo_replay_fault_buffer_info_r(), info);
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}
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void gp10b_replayable_pagefault_buffer_info(struct gk20a *g)
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{
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gk20a_dbg_fn("");
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pr_info("rpfb low: 0x%x\n",
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(gk20a_readl(g, fifo_replay_fault_buffer_lo_r()) >> 12));
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pr_info("rpfb hi: 0x%x\n",
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gk20a_readl(g, fifo_replay_fault_buffer_hi_r()));
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pr_info("rpfb enabled: 0x%x\n",
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(gk20a_readl(g, fifo_replay_fault_buffer_lo_r()) & 0x1));
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pr_info("rpfb size: %d\n",
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gk20a_readl(g, fifo_replay_fault_buffer_size_r()));
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pr_info("rpfb get index: %d\n",
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gp10b_replayable_pagefault_buffer_get_index(g));
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pr_info("rpfb put index: %d\n",
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gp10b_replayable_pagefault_buffer_put_index(g));
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pr_info("rpfb empty: %d\n",
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gp10b_replayable_pagefault_buffer_is_empty(g));
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pr_info("rpfb full %d\n",
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gp10b_replayable_pagefault_buffer_is_full(g));
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pr_info("rpfb overflow %d\n",
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gp10b_replayable_pagefault_buffer_is_overflow(g));
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gk20a_dbg_fn("done");
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}
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