mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
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Store pending sema waits so that they can be explicitly handled when the driver dies. If the sema_wait is freed before the pending wait is either handled or canceled problems occur. Internally the sync_fence_wait_async() function uses the kernel timers. That uses a linked list of possible events. That means every so often the kernel iterates through this list. If the list node that is in the sync_fence_waiter struct is freed before it can be removed from the pending timers list then the kernel timers list can be corrupted. When the kernel then iterates through this list crashes and other related problems can happen. Bug 1816516 Bug 1807277 Change-Id: Iddc4be64583c19bfdd2d88b9098aafc6ae5c6475 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1250025 (cherry picked from commit 01889e21bd31dbd7ee85313e98079138ed1d63be) Reviewed-on: http://git-master/r/1261920 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
224 lines
6.0 KiB
C
224 lines
6.0 KiB
C
/*
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* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/dma-mapping.h>
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#include <linux/firmware.h>
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#include "nvgpu_common.h"
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#include "gk20a/gk20a_scale.h"
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#include "gk20a/gk20a.h"
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#include "nvgpu_common.h"
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#define EMC3D_DEFAULT_RATIO 750
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static void nvgpu_init_vars(struct gk20a *g)
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{
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struct gk20a_platform *platform = dev_get_drvdata(g->dev);
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init_waitqueue_head(&g->sw_irq_stall_last_handled_wq);
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init_waitqueue_head(&g->sw_irq_nonstall_last_handled_wq);
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gk20a_init_gr(g);
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init_rwsem(&g->busy_lock);
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spin_lock_init(&g->mc_enable_lock);
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mutex_init(&platform->railgate_lock);
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mutex_init(&g->dbg_sessions_lock);
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mutex_init(&g->client_lock);
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mutex_init(&g->ch_wdt_lock);
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mutex_init(&g->poweroff_lock);
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g->regs_saved = g->regs;
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g->bar1_saved = g->bar1;
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g->emc3d_ratio = EMC3D_DEFAULT_RATIO;
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/* Set DMA parameters to allow larger sgt lists */
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g->dev->dma_parms = &g->dma_parms;
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dma_set_max_seg_size(g->dev, UINT_MAX);
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INIT_LIST_HEAD(&g->pending_sema_waits);
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raw_spin_lock_init(&g->pending_sema_waits_lock);
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}
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static void nvgpu_init_timeout(struct gk20a *g)
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{
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g->gr_idle_timeout_default = CONFIG_GK20A_DEFAULT_TIMEOUT;
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if (tegra_platform_is_silicon())
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g->timeouts_enabled = true;
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}
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static void nvgpu_init_timeslice(struct gk20a *g)
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{
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g->runlist_interleave = true;
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g->timeslice_low_priority_us = 1300;
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g->timeslice_medium_priority_us = 2600;
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g->timeslice_high_priority_us = 5200;
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}
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static void nvgpu_init_pm_vars(struct gk20a *g)
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{
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struct gk20a_platform *platform = dev_get_drvdata(g->dev);
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/*
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* Set up initial power settings. For non-slicon platforms, disable
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* power features and for silicon platforms, read from platform data
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*/
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g->slcg_enabled =
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tegra_platform_is_silicon() ? platform->enable_slcg : false;
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g->blcg_enabled =
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tegra_platform_is_silicon() ? platform->enable_blcg : false;
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g->elcg_enabled =
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tegra_platform_is_silicon() ? platform->enable_elcg : false;
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g->elpg_enabled =
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tegra_platform_is_silicon() ? platform->enable_elpg : false;
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g->aelpg_enabled =
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tegra_platform_is_silicon() ? platform->enable_aelpg : false;
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/* set default values to aelpg parameters */
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g->pmu.aelpg_param[0] = APCTRL_SAMPLING_PERIOD_PG_DEFAULT_US;
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g->pmu.aelpg_param[1] = APCTRL_MINIMUM_IDLE_FILTER_DEFAULT_US;
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g->pmu.aelpg_param[2] = APCTRL_MINIMUM_TARGET_SAVING_DEFAULT_US;
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g->pmu.aelpg_param[3] = APCTRL_POWER_BREAKEVEN_DEFAULT_US;
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g->pmu.aelpg_param[4] = APCTRL_CYCLES_PER_SAMPLE_MAX_DEFAULT;
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}
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static void nvgpu_init_mm_vars(struct gk20a *g)
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{
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struct gk20a_platform *platform = dev_get_drvdata(g->dev);
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g->mm.bypass_smmu = platform->bypass_smmu;
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g->mm.disable_bigpage = platform->disable_bigpage;
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g->mm.vidmem_is_vidmem = platform->vidmem_is_vidmem;
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}
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int nvgpu_probe(struct gk20a *g,
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const char *debugfs_symlink,
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const char *interface_name,
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struct class *class)
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{
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struct gk20a_platform *platform = dev_get_drvdata(g->dev);
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int err = 0;
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nvgpu_init_vars(g);
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nvgpu_init_timeout(g);
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nvgpu_init_timeslice(g);
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nvgpu_init_pm_vars(g);
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err = gk20a_user_init(g->dev, interface_name, class);
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if (err)
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return err;
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/* Initialize the platform interface. */
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err = platform->probe(g->dev);
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if (err) {
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dev_err(g->dev, "platform probe failed");
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return err;
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}
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/* Initialise scaling */
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if (IS_ENABLED(CONFIG_GK20A_DEVFREQ))
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gk20a_scale_init(g->dev);
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err = gk20a_secure_page_alloc(g->dev);
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if (err)
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dev_err(g->dev,
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"failed to allocate secure buffer %d\n", err);
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if (platform->late_probe) {
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err = platform->late_probe(g->dev);
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if (err) {
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dev_err(g->dev, "late probe failed");
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return err;
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}
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}
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nvgpu_init_mm_vars(g);
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gk20a_create_sysfs(g->dev);
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gk20a_debug_init(g->dev, debugfs_symlink);
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g->remove_support = gk20a_remove_support;
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return 0;
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}
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static const struct firmware *do_request_firmware(struct device *dev,
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const char *prefix, const char *fw_name, int flags)
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{
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const struct firmware *fw;
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char *fw_path = NULL;
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int path_len, err;
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if (prefix) {
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path_len = strlen(prefix) + strlen(fw_name);
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path_len += 2; /* for the path separator and zero terminator*/
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fw_path = kzalloc(sizeof(*fw_path) * path_len, GFP_KERNEL);
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if (!fw_path)
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return NULL;
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sprintf(fw_path, "%s/%s", prefix, fw_name);
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fw_name = fw_path;
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}
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#if LINUX_VERSION_CODE < KERNEL_VERSION(3,18,0)
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err = request_firmware(&fw, fw_name, dev);
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#else
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if (flags & NVGPU_REQUEST_FIRMWARE_NO_WARN)
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err = request_firmware_direct(&fw, fw_name, dev);
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else
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err = request_firmware(&fw, fw_name, dev);
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#endif
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kfree(fw_path);
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if (err)
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return NULL;
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return fw;
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}
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/* This is a simple wrapper around request_firmware that takes 'fw_name' and
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* applies an IP specific relative path prefix to it. The caller is
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* responsible for calling release_firmware later. */
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const struct firmware *nvgpu_request_firmware(struct gk20a *g,
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const char *fw_name,
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int flags)
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{
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struct device *dev = g->dev;
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const struct firmware *fw;
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/* current->fs is NULL when calling from SYS_EXIT.
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Add a check here to prevent crash in request_firmware */
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if (!current->fs || !fw_name)
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return NULL;
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BUG_ON(!g->ops.name);
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fw = do_request_firmware(dev, g->ops.name, fw_name, flags);
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#ifdef CONFIG_TEGRA_GK20A
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/* TO BE REMOVED - Support loading from legacy SOC specific path. */
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if (!fw && !(flags & NVGPU_REQUEST_FIRMWARE_NO_SOC)) {
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struct gk20a_platform *platform = gk20a_get_platform(dev);
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fw = do_request_firmware(dev,
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platform->soc_name, fw_name, flags);
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}
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#endif
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return fw;
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}
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