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016231c045
Modify the LTC code to only use a contiguous CompBit Cache (CBC). The original code had two allocation schemes: "physical" and "virtual" - what they meant was virtually contiguous or physically contiguous. The CBC must appear contiguous to the GPU be it either from the IOMMU or from physical pages allocated contiguously. This change makes the CBC get allocated with the FORCE_CONTIGUOUS flag if the GPU is not IOMMU'able. If we can get contiguous mem with the IOMMU then no need to force the underlying pages to be contiguous. However, not all GPUs may be IOMMU'able so we do need to handle that case. Also delete the gk20a/ltc_gk20a.[ch] code. All that remained in these files was the CBC alloc functions which were completely chip agnostic. As a result these functions were consolidated and moved to common/ltc.c. Bug 2015747 Change-Id: I3f41961b4f94378b954e7502a6b27cf0bc627375 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1593666 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
65 lines
2.1 KiB
C
65 lines
2.1 KiB
C
/*
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* Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/ltc.h>
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#include <nvgpu/dma.h>
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#include "gk20a/gk20a.h"
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#include "gk20a/gr_gk20a.h"
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int nvgpu_init_ltc_support(struct gk20a *g)
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{
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nvgpu_spinlock_init(&g->ltc_enabled_lock);
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g->mm.ltc_enabled_current = true;
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g->mm.ltc_enabled_target = true;
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if (g->ops.ltc.init_fs_state)
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g->ops.ltc.init_fs_state(g);
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return 0;
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}
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void nvgpu_ltc_sync_enabled(struct gk20a *g)
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{
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nvgpu_spinlock_acquire(&g->ltc_enabled_lock);
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if (g->mm.ltc_enabled_current != g->mm.ltc_enabled_target) {
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g->ops.ltc.set_enabled(g, g->mm.ltc_enabled_target);
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g->mm.ltc_enabled_current = g->mm.ltc_enabled_target;
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}
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nvgpu_spinlock_release(&g->ltc_enabled_lock);
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}
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int nvgpu_ltc_alloc_cbc(struct gk20a *g, size_t compbit_backing_size)
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{
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struct gr_gk20a *gr = &g->gr;
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unsigned long flags = 0;
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if (!nvgpu_iommuable(g))
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flags = NVGPU_DMA_FORCE_CONTIGUOUS;
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return nvgpu_dma_alloc_flags_sys(g,
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flags,
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compbit_backing_size,
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&gr->compbit_store.mem);
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}
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