mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-22 17:36:20 +03:00
420 lines
10 KiB
C
420 lines
10 KiB
C
/*
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* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <stdlib.h>
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#include <unistd.h>
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#include <unit/io.h>
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#include <unit/unit.h>
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#include <nvgpu/timers.h>
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#include <nvgpu/posix/posix-fault-injection.h>
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#include "posix-timers.h"
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struct test_timer_args {
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bool counter_timer;
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};
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static struct test_timer_args init_args = {
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.counter_timer = true,
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};
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#define TEST_TIMER_COUNT 10
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/* The value should be kept below 999 since it is used to calculate
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* the duration paramater to usleep. This will ensure that the duration
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* value passed to usleep is less than 1000000.
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*/
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#define TEST_TIMER_DURATION 10
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static struct nvgpu_timeout test_timeout;
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int test_timer_init(struct unit_module *m,
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struct gk20a *g, void *args)
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{
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int ret;
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unsigned int duration;
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unsigned long flags;
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struct test_timer_args *test_args = (struct test_timer_args *)args;
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if (test_args->counter_timer == true) {
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duration = TEST_TIMER_COUNT;
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flags = NVGPU_TIMER_RETRY_TIMER;
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} else {
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duration = TEST_TIMER_DURATION;
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flags = NVGPU_TIMER_CPU_TIMER;
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}
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ret = nvgpu_timeout_init(g, &test_timeout,
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duration,
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flags);
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if (ret != 0) {
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unit_return_fail(m, "Timer init failed %d\n", ret);
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}
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if (test_timeout.g != g) {
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unit_return_fail(m, "Timer g struct mismatch %d\n", ret);
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}
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if (test_timeout.flags != flags) {
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unit_return_fail(m, "Timer flags mismatch %d\n", ret);
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}
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return UNIT_SUCCESS;
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}
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int test_timer_init_err(struct unit_module *m,
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struct gk20a *g, void *args)
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{
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int ret, i;
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for (i = 0; i < 12; i++) {
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memset(&test_timeout, 0, sizeof(struct nvgpu_timeout));
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/* nvgpu_tiemout_init accepts only BIT(0), BIT(8), and BIT(9) as
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* valid flag bits. So ret should be EINVAL */
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ret = nvgpu_timeout_init(g, &test_timeout, 10, (1 << i));
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if ((i == 0) || (i == 8) || (i == 9)) {
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if (ret != 0) {
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unit_return_fail(m,
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"Timer init failed %d\n",
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ret);
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}
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} else {
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if (ret != -EINVAL) {
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unit_return_fail(m,
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"Timer init with invalid flag %d\n",
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ret);
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}
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}
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}
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/* BIT(0), BIT(8) and BIT(9) set. Return value should be 0 */
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ret = nvgpu_timeout_init(g, &test_timeout, 10, 0x301);
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if (ret != 0) {
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unit_return_fail(m,"Timer init failed with flag 0x301\n");
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}
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/* BIT(8) and BIT(9) set. Return value should be 0 */
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ret = nvgpu_timeout_init(g, &test_timeout, 10, 0x300);
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if (ret != 0) {
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unit_return_fail(m,"Timer init failed with flag 0x300\n");
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}
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/* BIT(0) and BIT(8) set. Return value should be 0 */
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ret = nvgpu_timeout_init(g, &test_timeout, 10, 0x101);
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if (ret != 0) {
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unit_return_fail(m,"Timer init failed with flag 0x101\n");
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}
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/* BIT(0) and BIT(9) set. Return value should be 0 */
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ret = nvgpu_timeout_init(g, &test_timeout, 10, 0x201);
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if (ret != 0) {
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unit_return_fail(m,"Timer init failed with flag 0x201\n");
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}
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/* BIT(0), BIT(7) and BIT(9) set. Return value should be -EINVAL */
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ret = nvgpu_timeout_init(g, &test_timeout, 10, 0x281);
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if (ret != -EINVAL) {
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unit_return_fail(m,"Timer init failed with flag 0x281\n");
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}
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/* BIT(5), BIT(7) and BIT(9) set. Return value should be -EINVAL */
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ret = nvgpu_timeout_init(g, &test_timeout, 10, 0x2A0);
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if (ret != -EINVAL) {
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unit_return_fail(m,"Timer init failed with flag 0x2A0\n");
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}
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/* BIT(1), BIT(2) and BIT(3) set. Return value should be -EINVAL */
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ret = nvgpu_timeout_init(g, &test_timeout, 10, 0x00E);
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if (ret != -EINVAL) {
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unit_return_fail(m,"Timer init failed with flag 0x00E\n");
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}
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/* BIT(1) to BIT(7) set. Return value should be -EINVAL */
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ret = nvgpu_timeout_init(g, &test_timeout, 10, 0x07E);
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if (ret != -EINVAL) {
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unit_return_fail(m,"Timer init failed with flag 0x07E\n");
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}
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/* All bits set. Return value should be -EINVAL */
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ret = nvgpu_timeout_init(g, &test_timeout, 10, 0xFFFFFFFFFFFFFFFF);
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if (ret != -EINVAL) {
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unit_return_fail(m,"Timer init failed with flag all 1s\n");
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}
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return UNIT_SUCCESS;
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}
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int test_timer_counter(struct unit_module *m,
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struct gk20a *g, void *args)
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{
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int ret;
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memset(&test_timeout, 0, sizeof(struct nvgpu_timeout));
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ret = nvgpu_timeout_init(g, &test_timeout,
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TEST_TIMER_COUNT,
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NVGPU_TIMER_RETRY_TIMER);
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if (ret != 0) {
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unit_return_fail(m, "Timer init failed %d\n", ret);
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}
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do {
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usleep(1);
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} while (nvgpu_timeout_expired(&test_timeout) == 0);
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if (!nvgpu_timeout_peek_expired(&test_timeout)) {
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unit_return_fail(m, "Counter mismatch %d\n",
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test_timeout.retries.attempted);
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}
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return UNIT_SUCCESS;
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}
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int test_timer_duration(struct unit_module *m,
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struct gk20a *g, void *args)
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{
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int ret;
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memset(&test_timeout, 0, sizeof(struct nvgpu_timeout));
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ret = nvgpu_timeout_init(g, &test_timeout,
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TEST_TIMER_DURATION,
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NVGPU_TIMER_CPU_TIMER);
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if (ret != 0) {
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unit_return_fail(m, "Timer init failed %d\n", ret);
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}
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/*
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* Timer should not be expired.
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* However, test execution may not be atomic and might get preempted.
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* In that scenario, the return value might not be zero.
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* Reading timer value also takes many cycles, hence it is difficult
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* to confirm if timer timedout before set timeout value.
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* So, here we print an error message if return value is not zero.
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*/
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ret = nvgpu_timeout_expired(&test_timeout);
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if (ret != 0) {
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unit_err(m,
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"Duration timer expired when not expected %d\n", ret);
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}
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/* Sleep for TEST_TIMER_DURATION */
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usleep((TEST_TIMER_DURATION * 1000));
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do {
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usleep(10);
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ret = nvgpu_timeout_expired(&test_timeout);
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} while (ret == 0);
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if (ret != -ETIMEDOUT) {
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unit_return_fail(m, "Duration timer not expired %d\n", ret);
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}
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if (!nvgpu_timeout_peek_expired(&test_timeout)) {
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unit_return_fail(m, "Duration failure\n");
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}
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return UNIT_SUCCESS;
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}
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int test_timer_fault_injection(struct unit_module *m,
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struct gk20a *g, void *args)
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{
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int ret;
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struct nvgpu_posix_fault_inj *timers_fi =
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nvgpu_timers_get_fault_injection();
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memset(&test_timeout, 0, sizeof(struct nvgpu_timeout));
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ret = nvgpu_timeout_init(g, &test_timeout,
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TEST_TIMER_DURATION,
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NVGPU_TIMER_CPU_TIMER);
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if (ret != 0) {
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unit_return_fail(m, "Timer init failed %d\n", ret);
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}
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nvgpu_posix_enable_fault_injection(timers_fi, true, 1);
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/* Timer should not be expired */
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ret = nvgpu_timeout_expired(&test_timeout);
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if (ret != 0) {
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unit_return_fail(m,
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"Fault injected timer expired when not expected %d\n",
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ret);
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}
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/* Timer should be expired */
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ret = nvgpu_timeout_expired(&test_timeout);
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if (ret != -ETIMEDOUT) {
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unit_return_fail(m,
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"Fault injected timer expired when not expected %d\n",
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ret);
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}
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nvgpu_posix_enable_fault_injection(timers_fi, false, 0);
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/* Sleep for TEST_TIMER_DURATION */
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usleep((TEST_TIMER_DURATION * 1000));
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do {
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usleep(10);
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ret = nvgpu_timeout_expired(&test_timeout);
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} while (ret == 0);
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if (ret != -ETIMEDOUT) {
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unit_return_fail(m, "Fault injected timer not expired %d\n",
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ret);
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}
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return UNIT_SUCCESS;
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}
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int test_timer_delay(struct unit_module *m,
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struct gk20a *g, void *args)
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{
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signed long ts_before, ts_after, delay;
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ts_before = nvgpu_current_time_us();
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nvgpu_udelay(5000);
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ts_after = nvgpu_current_time_us();
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delay = ts_after - ts_before;
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delay /= 1000;
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if (delay < 5) {
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unit_return_fail(m,
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"Delay Duration incorrect\n");
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}
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ts_before = nvgpu_current_time_us();
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nvgpu_usleep_range(5000, 10000);
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ts_after = nvgpu_current_time_us();
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delay = ts_after - ts_before;
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delay /= 1000;
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if (delay < 5) {
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unit_return_fail(m,
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"Delay Duration incorrect\n");
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}
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return UNIT_SUCCESS;
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}
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int test_timer_msleep(struct unit_module *m,
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struct gk20a *g, void *args)
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{
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signed long ts_before, ts_after, delay;
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delay = 0;
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ts_before = nvgpu_current_time_ms();
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nvgpu_msleep(5);
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ts_after = nvgpu_current_time_ms();
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delay = ts_after - ts_before;
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if (delay < 5) {
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unit_return_fail(m, "Sleep Duration incorrect\n");
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}
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return UNIT_SUCCESS;
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}
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#ifdef CONFIG_NVGPU_NON_FUSA
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int test_timer_hrtimestamp(struct unit_module *m,
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struct gk20a *g, void *args)
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{
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unsigned long cycles_read, cycles_bkp;
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int i;
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cycles_read = 0;
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cycles_bkp = 0;
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for (i = 0; i < 50; i++) {
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cycles_read = nvgpu_hr_timestamp();
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if (cycles_read < cycles_bkp) {
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unit_return_fail(m,
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"HR cycle value error %ld < %ld\n",
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cycles_read, cycles_bkp);
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}
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cycles_bkp = cycles_read;
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usleep(1);
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}
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return UNIT_SUCCESS;
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}
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#endif
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int test_timer_compare(struct unit_module *m,
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struct gk20a *g, void *args)
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{
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int i;
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signed long time_ms, time_ns;
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i = 0;
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time_ms = 0;
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time_ns = 0;
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while (i < 10) {
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time_ms = nvgpu_current_time_ms();
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time_ns = nvgpu_current_time_ns();
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time_ns /= 1000000;
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if (time_ns < time_ms) {
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unit_return_fail(m,
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"Err, ms and ns mismatch\n");
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}
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i++;
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usleep(1000);
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}
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return UNIT_SUCCESS;
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}
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struct unit_module_test posix_timers_tests[] = {
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UNIT_TEST(init, test_timer_init, &init_args, 0),
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UNIT_TEST(init_err, test_timer_init_err, NULL, 0),
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UNIT_TEST(counter, test_timer_counter, NULL, 0),
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UNIT_TEST(duration, test_timer_duration, NULL, 0),
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UNIT_TEST(fault_injection, test_timer_fault_injection, NULL, 0),
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UNIT_TEST(delay, test_timer_delay, NULL, 0),
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UNIT_TEST(msleep, test_timer_msleep, NULL, 0),
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#ifdef CONFIG_NVGPU_NON_FUSA
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UNIT_TEST(hr_cycles, test_timer_hrtimestamp, NULL, 0),
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#endif
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UNIT_TEST(compare, test_timer_compare, NULL, 0),
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};
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UNIT_MODULE(posix_timers, posix_timers_tests, UNIT_PRIO_POSIX_TEST);
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