Terje Bergstrom a6682186de gpu: nvgpu: gp10b: Fix CWD floorsweep programming ...

Program CWD TPC and SM registers correctly. The old code did not work
when there are more than 4 TPCs.

Change-Id: I18a14a0f76d97b0962607ec0bbd71aafcd768bca
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1143075
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>

2016-12-27 15:26:15 +05:30

drivers/gpu/nvgpu

gpu: nvgpu: gp10b: Fix CWD floorsweep programming

2016-12-27 15:26:15 +05:30

include

gpu: nvgpu: API to set preemption mode

2016-12-27 15:24:54 +05:30

scripts

checkpatch: add checkpatch.pl

2016-04-19 09:23:35 -07:00

.gitignore

.gitignore: Add to kernel-nvgpu

2016-05-10 14:37:53 -07:00

NVIDIA-REVIEWERS

nvgpu: Add NVIDIA-REVIEWERS file for nvgpu

2016-08-30 03:34:48 -07:00

Description

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42 MiB