Konsta Holtta 5cde4c2140 gpu: nvgpu: move chip specific channel reg ops to common ...

Extract out the HAL ops' implementation that now belongs to the channel
unit. This unit is responsible for channel register accesses and the
like (ccsr_*).

Rename channel_gm20b_bind to gm20b_fifo_channel_bind to match with the
rest of the naming. Same with channel_gv11b_unbind.

Jira NVGPU-1307

Change-Id: I58b9d96dbdaf36bdb163a5729544a41faec828ab
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2017262
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

2019-02-12 17:05:43 -08:00

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