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3a6d47db9d
This allows us to use these functions with both Tegra and Common Clock Frameworks Bug 200233943 Change-Id: I5a394d7bacfecabeabc64d32dab214d2e7cf89d7 Signed-off-by: Peter Boonstoppel <pboonstoppel@nvidia.com> Reviewed-on: http://git-master/r/1242481 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
62 lines
1.6 KiB
C
62 lines
1.6 KiB
C
/*
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* Copyright (c) 2011-2016, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/clk.h>
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#include "gk20a/gk20a.h"
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struct clk *gk20a_clk_get(struct gk20a *g)
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{
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if (!g->clk.tegra_clk) {
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struct clk *clk;
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char clk_dev_id[32];
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struct device *dev = dev_from_gk20a(g);
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snprintf(clk_dev_id, 32, "tegra_%s", dev_name(dev));
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clk = clk_get_sys(clk_dev_id, "gpu");
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if (IS_ERR(clk)) {
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gk20a_err(dev, "fail to get tegra gpu clk %s/gpu\n",
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clk_dev_id);
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return NULL;
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}
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g->clk.tegra_clk = clk;
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}
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return g->clk.tegra_clk;
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}
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unsigned long gk20a_clk_get_rate(struct gk20a *g)
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{
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struct clk_gk20a *clk = &g->clk;
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return rate_gpc2clk_to_gpu(clk->gpc_pll.freq);
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}
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long gk20a_clk_round_rate(struct gk20a *g, unsigned long rate)
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{
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/* make sure the clock is available */
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if (!gk20a_clk_get(g))
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return rate;
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return clk_round_rate(clk_get_parent(g->clk.tegra_clk), rate);
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}
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int gk20a_clk_set_rate(struct gk20a *g, unsigned long rate)
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{
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return clk_set_rate(g->clk.tegra_clk, rate);
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}
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