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The following CL contains the following VBIOS thermal table parsing and PMU interface support. 1) Thermal device table 2) Thermal channel table JIRA DNVGPU-130 Change-Id: I3c1baca3fec2727b6d20aa6c007096372a6a3efe Signed-off-by: Lakshmanan M <lm@nvidia.com> Reviewed-on: http://git-master/r/1240631 (cherry picked from commit 1d6fa9ab49b1c84e7f845de206821d879cbda356) Reviewed-on: http://git-master/r/1246204 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
71 lines
1.6 KiB
C
71 lines
1.6 KiB
C
/*
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* Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef NVGPU_BIOS_GM206_H
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#define NVGPU_BIOS_GM206_H
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#define PERF_PTRS_WIDTH 0x4
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#define PERF_PTRS_WIDTH_16 0x2
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#define NV_PCFG 0x88000
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enum {
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CLOCKS_TABLE = 2,
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CLOCK_PROGRAMMING_TABLE,
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FLL_TABLE,
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VIN_TABLE,
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FREQUENCY_CONTROLLER_TABLE
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};
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enum {
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PERFORMANCE_TABLE = 0,
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MEMORY_CLOCK_TABLE,
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MEMORY_TWEAK_TABLE,
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POWER_CONTROL_TABLE,
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THERMAL_CONTROL_TABLE,
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THERMAL_DEVICE_TABLE,
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THERMAL_COOLERS_TABLE,
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PERFORMANCE_SETTINGS_SCRIPT,
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CONTINUOUS_VIRTUAL_BINNING_TABLE,
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POWER_SENSORS_TABLE = 0xA,
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POWER_CAPPING_TABLE = 0xB,
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POWER_TOPOLOGY_TABLE = 0xF,
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THERMAL_CHANNEL_TABLE = 0x12,
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VOLTAGE_RAIL_TABLE = 26,
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VOLTAGE_DEVICE_TABLE,
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VOLTAGE_POLICY_TABLE,
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};
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enum {
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VP_FIELD_TABLE = 0,
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VP_FIELD_REGISTER,
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VP_TRANSLATION_TABLE,
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};
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struct bit_token {
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u8 token_id;
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u8 data_version;
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u16 data_size;
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u16 data_ptr;
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} __packed;
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struct gpu_ops;
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void gm206_init_bios(struct gpu_ops *gops);
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u8 gm206_bios_read_u8(struct gk20a *g, u32 offset);
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s8 gm206_bios_read_s8(struct gk20a *g, u32 offset);
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u16 gm206_bios_read_u16(struct gk20a *g, u32 offset);
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u32 gm206_bios_read_u32(struct gk20a *g, u32 offset);
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#endif
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