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9812bd5eea
On Maxwell comptaglines are assigned per 128k, but preferred big page size for graphics is 64k. Bit 16 of GPU VA is used for determining which half of comptagline is used. This creates problems if user space wants to map a page multiple times and to arbitrary GPU VA. In one mapping the page might be mapped to lower half of 128k comptagline, and in another mapping the page might be mapped to upper half. Turn on mode where MSB of comptagline in PTE is used instead of bit 16 for determining the comptagline lower/upper half selection. Bug 1704834 Change-Id: If87e8f6ac0fc9c5624e80fa1ba2ceeb02781355b Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/924322 Reviewed-by: Alex Waterman <alexw@nvidia.com>
155 lines
4.1 KiB
C
155 lines
4.1 KiB
C
/*
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* GM20B GPC MMU
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*
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* Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include <linux/types.h>
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#include "gk20a/gk20a.h"
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#include "gk20a/kind_gk20a.h"
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#include "gk20a/fb_gk20a.h"
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#include "hw_fb_gm20b.h"
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#include "hw_top_gm20b.h"
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#include "hw_gmmu_gm20b.h"
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static void fb_gm20b_init_fs_state(struct gk20a *g)
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{
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gk20a_dbg_info("initialize gm20b fb");
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gk20a_writel(g, fb_fbhub_num_active_ltcs_r(),
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g->ltc_count);
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}
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void gm20b_init_uncompressed_kind_map(void)
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{
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gk20a_init_uncompressed_kind_map();
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gk20a_uc_kind_map[gmmu_pte_kind_s8_v()] =
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gk20a_uc_kind_map[gmmu_pte_kind_s8_2s_v()] =
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gmmu_pte_kind_s8_v();
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}
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static bool gm20b_kind_supported(u8 k)
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{
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return k == gmmu_pte_kind_smsked_message_v()
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|| (k >= gmmu_pte_kind_s8_v() &&
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k <= gmmu_pte_kind_s8_2s_v());
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}
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static bool gm20b_kind_z(u8 k)
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{
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return (k >= gmmu_pte_kind_s8_v() &&
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k <= gmmu_pte_kind_s8_2s_v());
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}
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static bool gm20b_kind_compressible(u8 k)
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{
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return (k >= gmmu_pte_kind_s8_v() &&
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k <= gmmu_pte_kind_s8_2s_v());
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}
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static bool gm20b_kind_zbc(u8 k)
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{
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return (k >= gmmu_pte_kind_s8_v() &&
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k <= gmmu_pte_kind_s8_2s_v());
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}
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void gm20b_init_kind_attr(void)
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{
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u16 k;
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gk20a_init_kind_attr();
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for (k = 0; k < 256; k++) {
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if (gm20b_kind_supported((u8)k))
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gk20a_kind_attr[k] |= GK20A_KIND_ATTR_SUPPORTED;
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if (gm20b_kind_compressible((u8)k))
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gk20a_kind_attr[k] |= GK20A_KIND_ATTR_COMPRESSIBLE;
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if (gm20b_kind_z((u8)k))
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gk20a_kind_attr[k] |= GK20A_KIND_ATTR_Z;
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if (gm20b_kind_zbc((u8)k))
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gk20a_kind_attr[k] |= GK20A_KIND_ATTR_ZBC;
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}
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}
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static void gm20b_fb_set_mmu_page_size(struct gk20a *g)
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{
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/* set large page size in fb */
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u32 fb_mmu_ctrl = gk20a_readl(g, fb_mmu_ctrl_r());
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fb_mmu_ctrl |= fb_mmu_ctrl_use_pdb_big_page_size_true_f();
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gk20a_writel(g, fb_mmu_ctrl_r(), fb_mmu_ctrl);
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}
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static bool gm20b_fb_set_use_full_comp_tag_line(struct gk20a *g)
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{
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/* set large page size in fb */
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u32 fb_mmu_ctrl = gk20a_readl(g, fb_mmu_ctrl_r());
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fb_mmu_ctrl |= fb_mmu_ctrl_use_full_comp_tag_line_true_f();
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gk20a_writel(g, fb_mmu_ctrl_r(), fb_mmu_ctrl);
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return true;
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}
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static int gm20b_fb_compression_page_size(struct gk20a *g)
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{
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return SZ_128K;
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}
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static int gm20b_fb_compressible_page_size(struct gk20a *g)
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{
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return SZ_64K;
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}
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static void gm20b_fb_dump_vpr_wpr_info(struct gk20a *g)
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{
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u32 val;
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/* print vpr and wpr info */
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val = gk20a_readl(g, fb_mmu_vpr_info_r());
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val &= ~0x3;
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val |= fb_mmu_vpr_info_index_addr_lo_v();
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gk20a_writel(g, fb_mmu_vpr_info_r(), val);
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gk20a_err(dev_from_gk20a(g), "VPR: %08x %08x %08x %08x",
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gk20a_readl(g, fb_mmu_vpr_info_r()),
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gk20a_readl(g, fb_mmu_vpr_info_r()),
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gk20a_readl(g, fb_mmu_vpr_info_r()),
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gk20a_readl(g, fb_mmu_vpr_info_r()));
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val = gk20a_readl(g, fb_mmu_wpr_info_r());
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val &= ~0xf;
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val |= (fb_mmu_wpr_info_index_allow_read_v());
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gk20a_writel(g, fb_mmu_wpr_info_r(), val);
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gk20a_err(dev_from_gk20a(g), "WPR: %08x %08x %08x %08x %08x %08x",
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gk20a_readl(g, fb_mmu_wpr_info_r()),
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gk20a_readl(g, fb_mmu_wpr_info_r()),
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gk20a_readl(g, fb_mmu_wpr_info_r()),
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gk20a_readl(g, fb_mmu_wpr_info_r()),
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gk20a_readl(g, fb_mmu_wpr_info_r()),
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gk20a_readl(g, fb_mmu_wpr_info_r()));
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}
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void gm20b_init_fb(struct gpu_ops *gops)
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{
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gops->fb.reset = fb_gk20a_reset;
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gops->fb.init_fs_state = fb_gm20b_init_fs_state;
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gops->fb.set_mmu_page_size = gm20b_fb_set_mmu_page_size;
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gops->fb.set_use_full_comp_tag_line = gm20b_fb_set_use_full_comp_tag_line;
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gops->fb.compression_page_size = gm20b_fb_compression_page_size;
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gops->fb.compressible_page_size = gm20b_fb_compressible_page_size;
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gops->fb.dump_vpr_wpr_info = gm20b_fb_dump_vpr_wpr_info;
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gm20b_init_uncompressed_kind_map();
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gm20b_init_kind_attr();
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}
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