Files
linux-nvgpu/drivers/gpu/nvgpu/common/gr
Debarshi Dutta ca4db3fef3 gpu: nvgpu: disable access to regs in MIG mode
The following registers belong to GR but are not a part of
Sys-Compute Pipe.

gr_gpcs_tpcs_pe_vaf_r
gr_gpcs_tpcs_pes_vsc_vpc_r
gr_pd_ab_dist_cfg0_r

There was a check added for gr_pd_ab_dist_cfg0_r earlier,
however, the entire function needs to be disabled in runtime

Change-Id: I535d639261a080d0fd4db4a44312746420eca66a
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2518204
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Dinesh T <dt@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2021-04-26 03:37:28 -07:00
..
2021-02-02 23:34:27 -08:00