mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-23 01:50:07 +03:00
* As of now, working on multiple chip bringup in nvgpu-next repo has
an issue because we end with losing control on source code (hard to
find which part of the code belongs to which chip) and it's valuable
history this affects chip migration on release.
* To support multiple chip bringup simultaneously, we need new
guidelines to avoid losing control on source code and make migration
easier. This change adds links to nvgpu-next repo.
* Updated return code to ENODEV for consistency
* Updated ACR unittest to work with ENODEV return code
NOTE:
These are the initial set of infrastructure changes, guidelines
will evolve, and source code will get updated accordingly.
Based on future chip features, Which part of the source code falls
under nvgpu-next repo is decided.
JIRA NVGPU-6574
Change-Id: I81827e35d189c55554df00e255b527a4473e0338
Signed-off-by: Sagar Kadamati <skadamati@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2556793
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
184 lines
4.3 KiB
C
184 lines
4.3 KiB
C
/*
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* Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/types.h>
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#include <nvgpu/dma.h>
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#include <nvgpu/firmware.h>
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#include <nvgpu/gk20a.h>
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#include <nvgpu/acr.h>
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#include "acr_priv.h"
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#ifdef CONFIG_NVGPU_ACR_LEGACY
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#include "acr_sw_gm20b.h"
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#include "acr_sw_gp10b.h"
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#endif
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#include "acr_sw_gv11b.h"
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#ifdef CONFIG_NVGPU_DGPU
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#include "acr_sw_tu104.h"
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#endif
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#ifdef CONFIG_NVGPU_NON_FUSA
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#include "acr_sw_ga10b.h"
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#ifdef CONFIG_NVGPU_DGPU
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#include "acr_sw_ga100.h"
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#endif
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#endif
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#if defined(CONFIG_NVGPU_NON_FUSA) && defined(CONFIG_NVGPU_NEXT)
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#include <nvgpu_next_acr.h>
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#endif
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/* ACR public API's */
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bool nvgpu_acr_is_lsf_lazy_bootstrap(struct gk20a *g, struct nvgpu_acr *acr,
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u32 falcon_id)
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{
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if (acr == NULL) {
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return false;
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}
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if ((falcon_id == FALCON_ID_FECS) || (falcon_id == FALCON_ID_PMU) ||
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(falcon_id == FALCON_ID_GPCCS)) {
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return acr->lsf[falcon_id].is_lazy_bootstrap;
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} else {
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nvgpu_err(g, "Invalid falcon id\n");
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return false;
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}
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}
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#ifdef CONFIG_NVGPU_DGPU
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int nvgpu_acr_alloc_blob_prerequisite(struct gk20a *g, struct nvgpu_acr *acr,
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size_t size)
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{
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if (acr == NULL) {
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return -EINVAL;
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}
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return acr->alloc_blob_space(g, size, &acr->ucode_blob);
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}
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#endif
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/* ACR blob construct & bootstrap */
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int nvgpu_acr_bootstrap_hs_acr(struct gk20a *g, struct nvgpu_acr *acr)
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{
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int err = 0;
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if (acr == NULL) {
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return -EINVAL;
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}
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err = acr->bootstrap_hs_acr(g, acr);
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if (err != 0) {
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nvgpu_err(g, "ACR bootstrap failed");
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}
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nvgpu_log(g, gpu_dbg_gr, "ACR bootstrap Done");
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return err;
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}
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int nvgpu_acr_construct_execute(struct gk20a *g)
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{
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int err = 0;
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if (g->acr == NULL) {
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return -EINVAL;
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}
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err = g->acr->prepare_ucode_blob(g);
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if (err != 0) {
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nvgpu_err(g, "ACR ucode blob prepare failed");
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goto done;
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}
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err = nvgpu_acr_bootstrap_hs_acr(g, g->acr);
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if (err != 0) {
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nvgpu_err(g, "Bootstrap HS ACR failed");
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}
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done:
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return err;
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}
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/* ACR init */
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int nvgpu_acr_init(struct gk20a *g)
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{
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u32 ver = nvgpu_safe_add_u32(g->params.gpu_arch,
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g->params.gpu_impl);
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int err = 0;
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if (g->acr != NULL) {
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/*
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* Recovery/unrailgate case, we do not need to do ACR init as ACR is
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* set during cold boot & doesn't execute ACR clean up as part off
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* sequence, so reuse to perform faster boot.
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*/
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return err;
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}
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g->acr = (struct nvgpu_acr *)nvgpu_kzalloc(g, sizeof(struct nvgpu_acr));
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if (g->acr == NULL) {
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err = -ENOMEM;
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goto done;
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}
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switch (ver) {
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#ifdef CONFIG_NVGPU_ACR_LEGACY
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case GK20A_GPUID_GM20B:
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case GK20A_GPUID_GM20B_B:
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nvgpu_gm20b_acr_sw_init(g, g->acr);
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break;
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case NVGPU_GPUID_GP10B:
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nvgpu_gp10b_acr_sw_init(g, g->acr);
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break;
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#endif
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case NVGPU_GPUID_GV11B:
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nvgpu_gv11b_acr_sw_init(g, g->acr);
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break;
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#if defined(CONFIG_NVGPU_NON_FUSA)
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case NVGPU_GPUID_GA10B:
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nvgpu_ga10b_acr_sw_init(g, g->acr);
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break;
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#endif /* CONFIG_NVGPU_NON_FUSA */
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#ifdef CONFIG_NVGPU_DGPU
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case NVGPU_GPUID_TU104:
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nvgpu_tu104_acr_sw_init(g, g->acr);
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break;
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#if defined(CONFIG_NVGPU_NON_FUSA)
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case NVGPU_GPUID_GA100:
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nvgpu_ga100_acr_sw_init(g, g->acr);
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break;
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#endif /* CONFIG_NVGPU_NON_FUSA */
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#endif
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default:
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#if defined(CONFIG_NVGPU_NON_FUSA) && defined(CONFIG_NVGPU_NEXT)
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if (nvgpu_next_acr_init(g))
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#endif
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{
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nvgpu_kfree(g, g->acr);
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err = -ENODEV;
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nvgpu_err(g, "no support for GPUID %x", ver);
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}
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break;
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}
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done:
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return err;
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}
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