Seema Khowala b28e43f62b gpu: nvgpu: gv11b: fifo ops get_mmu_fault_info set to NULL ...

mmu fault h/w registers are no longer inside fifo module

JIRA GPUT19X-7
JIRA GPUT19X-12

Change-Id: I7d166f0e80cee7c040289b13a053ff2cdb7d8727
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1487327
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

2017-05-30 11:04:10 -07:00

..

gpu/nvgpu

gpu: nvgpu: gv11b: fifo ops get_mmu_fault_info set to NULL

2017-05-30 11:04:10 -07:00