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a3e2283cf2
This patch fixes a bug in the cbc initialization code for ga10b, where it was erroneously assumed that a fixed ltc count of only one should be used for historical reasons. For volta and later, the full ltc count should be used in cbc-related computation. Ensure - CBC base address is 64K aligned - CBC start address lies within CBC allocated memory Check CBC is marked safe only for silicon platform. Bug 3353418 Change-Id: I5edee2a78dc9e8c149e111a9f088a57e0154f5c2 Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2585778 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: Seema Khowala <seemaj@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
41 lines
1.5 KiB
C
41 lines
1.5 KiB
C
/*
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* Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef CBC_TU104_H
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#define CBC_TU104_H
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#ifdef CONFIG_NVGPU_COMPRESSION
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#include <nvgpu/types.h>
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enum nvgpu_cbc_op;
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struct gk20a;
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struct nvgpu_cbc;
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int tu104_cbc_alloc_comptags(struct gk20a *g, struct nvgpu_cbc *cbc);
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int tu104_cbc_ctrl(struct gk20a *g, enum nvgpu_cbc_op op,
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u32 min, u32 max);
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void tu104_cbc_init(struct gk20a *g, struct nvgpu_cbc *cbc);
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#endif
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#endif
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