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432017248e
JIRA DNVGPU-42 Change-Id: Ic2fca9d0cf82f2823654ac5e8f0772a1eec7b3b5 Signed-off-by: Vijayakumar Subbu <vsubbu@nvidia.com> Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1205850 (cherry picked from commit b9f5c6bc4e649162d63e33d65b725872340ca114) Reviewed-on: http://git-master/r/1227257 GVS: Gerrit_Virtual_Submit
69 lines
1.8 KiB
C
69 lines
1.8 KiB
C
/*
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* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef _CLKFLL_H_
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#define _CLKFLL_H_
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#include "pmuif/gpmuifclk.h"
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#include "boardobj/boardobjgrp_e32.h"
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#include "boardobj/boardobjgrpmask.h"
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/*data and function definition to talk to driver*/
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u32 clk_fll_sw_setup(struct gk20a *g);
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u32 clk_fll_pmu_setup(struct gk20a *g);
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struct avfsfllobjs {
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struct boardobjgrp_e32 super;
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struct boardobjgrpmask_e32 lut_prog_master_mask;
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u32 lut_step_size_uv;
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u32 lut_min_voltage_uv;
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u8 lut_num_entries;
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u16 max_min_freq_mhz;
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};
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struct fll_device;
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typedef u32 fll_lut_broadcast_slave_register(struct gk20a *g,
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struct avfsfllobjs *pfllobjs,
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struct fll_device *pfll,
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struct fll_device *pfll_slave);
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struct fll_device {
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struct boardobj super;
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u8 id;
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u8 mdiv;
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u16 input_freq_mhz;
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u32 clk_domain;
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u8 vin_idx_logic;
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u8 vin_idx_sram;
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u8 rail_idx_for_lut;
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struct nv_pmu_clk_lut_device_desc lut_device;
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struct nv_pmu_clk_regime_desc regime_desc;
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u8 min_freq_vfe_idx;
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u8 freq_ctrl_idx;
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u8 target_regime_id_override;
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struct boardobjgrpmask_e32 lut_prog_broadcast_slave_mask;
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fll_lut_broadcast_slave_register *lut_broadcast_slave_register;
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};
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#define CLK_FLL_LUT_VF_NUM_ENTRIES(pclk) \
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(pclk->avfs_fllobjs.lut_num_entries)
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#define CLK_FLL_LUT_MIN_VOLTAGE_UV(pclk) \
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(pclk->avfs_fllobjs.lut_min_voltage_uv)
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#define CLK_FLL_LUT_STEP_SIZE_UV(pclk) \
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(pclk->avfs_fllobjs.lut_step_size_uv)
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#endif
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