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Add missing register host_err and bar0 error masks to find actual error type of pmu bar0 pri timeout. Jira NVGPU-1902 Change-Id: I4ec5a5230517e34bf5a843c2f0d9b0473875350f Signed-off-by: Prateek sethi <prsethi@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2069182 Reviewed-by: Raghuram Kothakota <rkothakota@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Ankur Kishore <ankkishore@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>