Files
linux-nvgpu/drivers/gpu/nvgpu/hal/fifo/engines_gm20b.h
Seema Khowala 0e82e8d6c3 gpu: nvgpu: move init_ce_engine_info from fifo to engine
Move init_ce_engine_info from fifo to hal/engine unit as
implementation is chip specific.

Rename init_ce_engine_info to init_ce_info
Rename gp10b_fifo_init_ce_engine_info to gp10b_engine_init_ce_info
Rename gm20b_fifo_init_ce_engine_info to gm20b_engine_init_ce_info

JIRA NVGPU-1313

Change-Id: Idb9ba3f2550eff6bbe7163d12e48086f47d3f319
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2085427
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-04-04 04:08:07 -07:00

35 lines
1.4 KiB
C

/*
* Copyright (c) 2011-2019, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef NVGPU_ENGINE_GM20B_H
#define NVGPU_ENGINE_GM20B_H
#include <nvgpu/types.h>
struct gk20a;
struct fifo_gk20a;
bool gm20b_is_fault_engine_subid_gpc(struct gk20a *g, u32 engine_subid);
int gm20b_engine_init_ce_info(struct fifo_gk20a *f);
#endif /* NVGPU_ENGINE_GM20B_H */