Sagar Kamble cdeaf09b2b gpu: nvgpu: falcon: whitelist MISRA 11.3 violations ...

Whitelist 2 MISRA Rule 11.3 violations in falcon that were approved as
deviations in TID-415. Check for alignment is added before casting the
u8 pointer to u32 pointer and unaligned source buffers are handled
byte by byte.

JIRA NVGPU-4812
JIRA TID-415

Change-Id: Ib7aaced0714029392c9d94468a74f11f182c9d74
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2272752
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

2020-12-15 14:10:29 -06:00

..

gpu

gpu: nvgpu: falcon: whitelist MISRA 11.3 violations

2020-12-15 14:10:29 -06:00

Kconfig

nvgpu: use kernel overlay features

2017-10-29 11:00:55 -07:00