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gpu: nvgpu: falcon: whitelist MISRA 11.3 violations

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Whitelist 2 MISRA Rule 11.3 violations in falcon that were approved as
deviations in TID-415. Check for alignment is added before casting the
u8 pointer to u32 pointer and unaligned source buffers are handled
byte by byte.

JIRA NVGPU-4812
JIRA TID-415

Change-Id: Ib7aaced0714029392c9d94468a74f11f182c9d74
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2272752
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Sagar Kamble
2020-01-03 11:25:44 +05:30
committed by Alex Waterman
parent 052f15deb9
commit cdeaf09b2b
1 changed files with 2 additions and 0 deletions
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2
drivers/gpu/nvgpu/hal/falcon/falcon_gk20a_fusa.c
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@@ -188,6 +188,7 @@ int gk20a_falcon_copy_to_dmem(struct nvgpu_falcon *flcn,
dst | falcon_falcon_dmemc_aincw_f(1));
if (likely(nvgpu_mem_is_word_aligned(flcn->g, src))) {
NVGPU_COV_WHITELIST(deviate, NVGPU_MISRA(Rule, 11_3), "TID-415")
src_u32 = (u32 *)src;
for (i = 0; i < words; i++) {
@@ -300,6 +301,7 @@ int gk20a_falcon_copy_to_imem(struct nvgpu_falcon *flcn, u32 dst,
falcon_falcon_imemc_secure_f(sec ? 1U : 0U));
if (likely(nvgpu_mem_is_word_aligned(flcn->g, src))) {
NVGPU_COV_WHITELIST(deviate, NVGPU_MISRA(Rule, 11_3), "TID-415")
src_u32 = (u32 *)src;
for (i = 0U; i < words; i++) {