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Fuse registers should be queried with physical gpc-id and not the logical ones. For tu104 and before chips physical gpc-ids are same as logical for non-floorswept config but for newer chips it may differ. Also, logical to physical mapping is not present for a floorswept gpc so query gpc_tpc mask only upto actual gpcs that are present. Jira NVGPU-6080 Change-Id: I84c4a3c1f256fdd1927f4365af26e9892fe91beb Signed-off-by: shashank singh <shashsingh@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2417721 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
15 KiB
15 KiB