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dfafddcc21
Delete apply_ctxsw_timeout_intr ops and add ctxsw_timeout_enable ops Move chip specific sched_error and ctxsw_timeout functions to hal/fifo/fifo_intr_* and hal/fifo/ctxsw_timeout_* Add nvgpu_rc_ctxsw_timeout function under common/rc/rc.c Do not check ctxsw timeout for channels that are no more bound to tsg. JIRA NVGPU-1312 Change-Id: Ide977fb60b3b72a27d9f22873f7a416c3bd1181d Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2075734 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
46 lines
1.8 KiB
C
46 lines
1.8 KiB
C
/*
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* Copyright (c) 2011-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/gk20a.h>
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#include <nvgpu/fifo.h>
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#include <nvgpu/channel.h>
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#include <nvgpu/tsg.h>
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#include <nvgpu/error_notifier.h>
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#include <nvgpu/nvgpu_err.h>
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#include <nvgpu/rc.h>
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#include "gk20a/fifo_gk20a.h"
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void nvgpu_rc_ctxsw_timeout(struct gk20a *g, u32 eng_bitmask,
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struct tsg_gk20a *tsg, bool debug_dump)
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{
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nvgpu_tsg_set_error_notifier(g, tsg,
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NVGPU_ERR_NOTIFIER_FIFO_ERROR_IDLE_TIMEOUT);
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/*
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* Cancel all channels' wdt since ctxsw timeout might
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* trigger multiple watchdogs at a time
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*/
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nvgpu_channel_wdt_restart_all_channels(g);
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gk20a_fifo_recover(g, eng_bitmask, tsg->tsgid, true, true, debug_dump,
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RC_TYPE_CTXSW_TIMEOUT);
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}
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