Thomas Fleury e61452ab5c gpu: nvgpu: tsg MISRA fixes for Rule 10.8 ...

roundup() violates MISRA Rule 10.8 when using operands
of different sizes. Use u32 operands.

Jira NVGPU-3259

Change-Id: Iff8983347cfef0d63fc6a51c2df1b2798eba48f9
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2111434
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

2019-05-03 15:16:00 -07:00

..

nvgpu

gpu: nvgpu: tsg MISRA fixes for Rule 10.8

2019-05-03 15:16:00 -07:00

Makefile

nvgpu: use kernel overlay features

2017-10-29 11:00:55 -07:00