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3659c2f0c1
Configure PCE/LCE mapping as follows: - PCE0 (HSHUB) is unconnected - GR_CE1, LCE4 share PCE1 (HSHUB) - LCE2 gets PCE2 (FBHUB) - GR_CE0, LCE3 share PCE3 (FBHUB) Bug 2494068 Change-Id: I25ddf7976f67f3faf3a9ef8cf79dcd9619ab5e63 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2151041 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
62 lines
2.2 KiB
C
62 lines
2.2 KiB
C
/*
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* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/log.h>
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#include <nvgpu/io.h>
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#include "ce_tu104.h"
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#include <nvgpu/hw/tu104/hw_ce_tu104.h>
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void tu104_ce_set_pce2lce_mapping(struct gk20a *g)
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{
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/*
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* By default GRCE0 and GRCE1 share PCE0.
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* Do not change PCE0 config until GRCEs are remapped to PCE1/PCE3.
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*/
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/* PCE1 (HSHUB) is assigned to LCE4 */
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nvgpu_writel(g, ce_pce2lce_config_r(1),
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ce_pce2lce_config_pce_assigned_lce_f(4));
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/* GRCE1 shares with LCE4 */
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nvgpu_writel(g, ce_grce_config_r(1),
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ce_grce_config_shared_lce_f(4) |
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ce_grce_config_shared_f(1));
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/* PCE2 (FBHUB) is assigned to LCE2 */
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nvgpu_writel(g, ce_pce2lce_config_r(2),
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ce_pce2lce_config_pce_assigned_lce_f(2));
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/* PCE3 (FBHUB) is assigned to LCE3 */
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nvgpu_writel(g, ce_pce2lce_config_r(3),
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ce_pce2lce_config_pce_assigned_lce_f(3));
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/* GRCE0 shares with LCE3 */
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nvgpu_writel(g, ce_grce_config_r(0),
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ce_grce_config_shared_lce_f(3) |
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ce_grce_config_shared_f(1));
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/* PCE0 (HSHUB) is unconnected */
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nvgpu_writel(g, ce_pce2lce_config_r(0),
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ce_pce2lce_config_pce_assigned_lce_none_f());
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}
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