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1c3fbd9dc7
Move chip specific fuse code from common/fuse to hal/fuse. Replace gk20a_readl/writel with nvgpu_readl/writel Replace 0xFFFFFFFFU with U32_MAX hash define JIRA NVGPU-2035 Change-Id: Icaa908db036053d5e6f4ff20b9e5b1d6c0ab2fda Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2033278 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
39 lines
1.5 KiB
C
39 lines
1.5 KiB
C
/*
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* GP106 FUSE
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*
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* Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_FUSE_GP106_H
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#define NVGPU_FUSE_GP106_H
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struct gk20a;
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u32 gp106_fuse_read_vin_cal_fuse_rev(struct gk20a *g);
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int gp106_fuse_read_vin_cal_slope_intercept_fuse(struct gk20a *g,
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u32 vin_id, u32 *slope,
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u32 *intercept);
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int gp106_fuse_read_vin_cal_gain_offset_fuse(struct gk20a *g,
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u32 vin_id, s8 *gain,
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s8 *offset);
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#endif /* NVGPU_FUSE_GP106_H */
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