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2540a98aa4
This patch adds a number of missing 'Targets' fields in the SWUTS of various fifo units, fixes some missing ones and adds gops based targets. Jira NVGPU-4376 Change-Id: I445196e7092b01853786f40b860b29abc5d68371 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2276680 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
136 lines
4.5 KiB
C
136 lines
4.5 KiB
C
/*
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* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef UNIT_NVGPU_RUNLIST_GK20A_H
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#define UNIT_NVGPU_RUNLIST_GK20A_H
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#include <nvgpu/types.h>
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struct unit_module;
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struct gk20a;
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/** @addtogroup SWUTS-fifo-runlist-gk20a
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* @{
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*
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* Software Unit Test Specification for fifo/runlist/gk20a
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*/
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/**
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* Test specification for: test_gk20a_runlist_length_max
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*
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* Description: Branch coverage for gk20a_runlist_length_max
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*
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* Test Type: Feature
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*
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* Targets: gops_runlist.length_max, gk20a_runlist_length_max
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Check that max length matches definition in H/W manuals.
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_gk20a_runlist_length_max(struct unit_module *m,
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struct gk20a *g, void *args);
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/**
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* Test specification for: test_gk20a_runlist_hw_submit
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*
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* Description: Branch coverage for gk20a_runlist_hw_submit
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*
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* Test Type: Feature
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*
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* Targets: gops_runlist.hw_submit, gk20a_runlist_hw_submit
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Check that fifo_runlist_base_r is not programmed when count is 0.
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* - Check that fifo_runlist_base_r is programmed with count > 0.
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* - Check that runlist_r register is programmed with runlist_id and count.
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_gk20a_runlist_hw_submit(struct unit_module *m,
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struct gk20a *g, void *args);
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/**
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* Test specification for: test_gk20a_runlist_wait_pending
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*
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* Description: Branch coverage for gk20a_runlist_wait_pending
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*
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* Test Type: Feature
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*
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* Targets: gops_runlist.wait_pending, gk20a_runlist_wait_pending
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Check case where runlist is not pending (not wait).
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* - Set register to indicate that runlist is NOT pending.
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* - Call gk20a_runlist_wait_pending.
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* - Check case where some polling is needed until runlist is not pending:
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* - Install register IO callbacks in order to control
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* value read from fifo_eng_runlist_r register.
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* - Configure callback to clear pending bit after one nvgpu_readl.
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* - Call gk20a_runlist_wait_pending.
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* - Configure callback to clear pending bit after two nvgpu_readl.
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* - Call gk20a_runlist_wait_pending.
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* - Check case where polling times out:
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* - Set register to indicate that runlist is pending.
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* - Call gk20a_runlist_wait_pending.
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* - Check case where nvgpu_timeout_init fails, using fault injection.
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_gk20a_runlist_wait_pending(struct unit_module *m,
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struct gk20a *g, void *args);
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/**
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* Test specification for: test_gk20a_runlist_write_state
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*
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* Description: Branch coverage for gk20a_runlist_write_state
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*
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* Test Type: Feature
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*
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* Targets: gops_runlist.write_state, gk20a_runlist_write_state
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Use nested loops to test combinations of:
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* - Initial value fifo_sched_disable_r() is either 0 or U32_MAX.
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* - runlists_mask varies from 0 to 3.
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* - runlist_state is either RUNLIST_DISABLED or RUNLIST_ENABLED.
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* - Check that corresponding bits are set/cleared in fifo_sched_disabled_r.
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_gk20a_runlist_write_state(struct unit_module *m,
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struct gk20a *g, void *args);
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/**
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* @}
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*/
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#endif /* UNIT_NVGPU_RUNLIST_GK20A_H */
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