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f2ad7e091643807678e3a812b0ec16f57d2ef41c
SEC2 isr handling requires message processing in common msg unit. That unit requires interfaces from hal to know if the msg interrupt was received, set the msg interrupt and handle other interrupts. JIRA NVGPU-2025 Change-Id: I3b5ad8968ea9298cc769113417931c4678009cf1 Signed-off-by: Sagar Kamble <skamble@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2085753 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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