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7d16f7e52c
Remove <soc/tegra/fuse.h> includes and include <nvgpu/fuse.h> header to remove direct dependency on platform specific header Use specific APIs like below to read/write fuses nvgpu_tegra_fuse_write_bypass() nvgpu_tegra_fuse_write_opt_gpu_tpc0_disable() Remove old code which was compiled for kernel versions less than 4.4 since we support only k4.4 and greater versions now Jira NVGPU-75 Change-Id: Iddd8e1a8da7effbce2aff217e8e25f7de04962d6 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1497518 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
48 lines
1.5 KiB
C
48 lines
1.5 KiB
C
/*
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* GM20B GPC MMU
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*
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* Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef _NVHOST_GM20B_GR_MMU_H
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#define _NVHOST_GM20B_GR_MMU_H
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#include <linux/version.h>
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struct gk20a;
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enum {
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MAXWELL_B = 0xB197,
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MAXWELL_COMPUTE_B = 0xB1C0,
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KEPLER_INLINE_TO_MEMORY_B= 0xA140,
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MAXWELL_DMA_COPY_A = 0xB0B5,
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MAXWELL_CHANNEL_GPFIFO_A= 0xB06F,
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};
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#define NVB197_SET_ALPHA_CIRCULAR_BUFFER_SIZE 0x02dc
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#define NVB197_SET_CIRCULAR_BUFFER_SIZE 0x1280
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#define NVB197_SET_SHADER_EXCEPTIONS 0x1528
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#define NVB197_SET_RD_COALESCE 0x102c
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#define NVB1C0_SET_SHADER_EXCEPTIONS 0x1528
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#define NVB1C0_SET_RD_COALESCE 0x0228
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#define NVA297_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0
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void gm20b_init_gr(struct gpu_ops *gops);
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void gr_gm20b_commit_global_attrib_cb(struct gk20a *g,
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struct channel_ctx_gk20a *ch_ctx,
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u64 addr, bool patch);
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int gr_gm20b_init_fs_state(struct gk20a *g);
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int gm20b_gr_tpc_disable_override(struct gk20a *g, u32 mask);
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void gr_gm20b_set_rd_coalesce(struct gk20a *g, u32 data);
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#endif
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