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1. Add VBIOS PS3.5 Clk programming table parsing code. 2. Update pmuifclk.h to match R400 pmu ucode pmuifclk.h 3. New clk_prog boardobj types have been added to support PS3.5 and to match the pmu ucode side changes 4. Add PS3.5 related construct and pmudatainit fops 5. PS3.5 clk programming table has secondary VF curve entries. Though these entries are currently marked as invalid for all SKUs, we need to add them to match struct sizes on PMU. 6. The pmuifclk.h nvgpu<->pmu interface changes needed for Turing(PS3.5) are NOT compatible with GV100 branched ucode. The secondary VF curve entries added for PS3.5 increase the entrysize breaking compatibility with GV100. 7. This change is therefore dependant on GV100 PMU ucode changes which increase the entrysize on GV100 pmu side. JIRA NVGPU-1153 Change-Id: I868e503f87731442aae6503872ade4c208831d34 Signed-off-by: tkudav <tkudav@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1842627 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
48 KiB
48 KiB